Searched refs:imem_base (Results 1 – 10 of 10) sorted by relevance
| /linux/drivers/gpu/drm/nouveau/nvkm/falcon/ |
| A D | gm200.c | 98 gm200_flcn_pio_imem_wr_init(struct nvkm_falcon *falcon, u8 port, bool sec, u32 imem_base) in gm200_flcn_pio_imem_wr_init() argument
100 nvkm_falcon_wr32(falcon, 0x180 + (port * 0x10), (sec ? BIT(28) : 0) | BIT(24) | imem_base); in gm200_flcn_pio_imem_wr_init()
312 IMEM, fw->imem_base, fw->imem_size, fw->imem_base >> 8, true); in gm200_flcn_fw_load()
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| A D | ga102.c | 136 IMEM, fw->imem_base, fw->imem_size, true); in ga102_flcn_fw_load()
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| A D | fw.c | 269 fw->imem_base = ALIGN(lhdr->apps[0], 0x100); in nvkm_falcon_fw_ctor_hs()
341 fw->imem_base = 0; in nvkm_falcon_fw_ctor_hs_v2()
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ |
| A D | tu102.c | 64 fw->imem_base = lhdr->app[0].offset; in tu102_gsp_booter_ctor()
87 .sec_code_off = fw->imem_base, in tu102_gsp_fwsec_load_bld()
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| A D | fwsec.c | 194 fw->imem_base = desc->IMEMSecBase; in nvkm_gsp_fwsec_v2()
238 fw->imem_base = desc->IMEMPhysBase; in nvkm_gsp_fwsec_v3()
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| A D | ga102.c | 73 fw->imem_base = 0; in ga102_gsp_booter_ctor()
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/acr/ |
| A D | gp108.c | 36 .sec_code_off = fw->imem_base, in gp108_acr_hsfw_load_bld()
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| A D | gm20b.c | 56 .sec_code_off = fw->imem_base, in gm20b_acr_hsfw_load_bld()
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| A D | gm200.c | 232 .sec_code_off = fw->imem_base, in gm200_acr_hsfw_load_bld()
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| /linux/drivers/gpu/drm/nouveau/include/nvkm/core/ |
| A D | falcon.h | 120 u32 imem_base; member
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