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Searched refs:initial_offset (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/md/dm-vdo/
A Dencodings.c369 size_t initial_offset; in decode_block_map_state_2_0() local
380 initial_offset = *offset; in decode_block_map_state_2_0()
418 size_t initial_offset; in encode_block_map_state_2_0() local
422 initial_offset = *offset; in encode_block_map_state_2_0()
471 size_t initial_offset; in encode_recovery_journal_state_7_0() local
475 initial_offset = *offset; in encode_recovery_journal_state_7_0()
496 size_t initial_offset; in decode_recovery_journal_state_7_0() local
551 size_t initial_offset; in encode_slab_depot_state_2_0() local
581 size_t initial_offset; in decode_slab_depot_state_2_0() local
979 size_t initial_offset; in encode_layout() local
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/linux/drivers/gpu/drm/display/
A Ddrm_dsc_helper.c205 pps_payload->initial_offset = in drm_dsc_pps_payload_pack()
206 cpu_to_be16(dsc_cfg->initial_offset); in drm_dsc_pps_payload_pack()
334 u16 initial_offset; member
1278 vdsc_cfg->initial_offset = rc_params->initial_offset; in drm_dsc_setup_rc_params()
1398 vdsc_cfg->initial_offset + in drm_dsc_compute_rc_parameters()
1427 rbs_min = vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset + in drm_dsc_compute_rc_parameters()
1461 return 8 * dsc->rc_model_size / (dsc->rc_model_size - dsc->initial_offset); in drm_dsc_initial_scale_value()
1499 cfg->initial_offset, cfg->final_offset, cfg->slice_bpg_offset); in drm_dsc_dump_config_main_params()
/linux/drivers/gpu/drm/amd/display/dc/dsc/
A Drc_calc_dpi.c52 to->initial_offset = from->initial_offset; in copy_pps_fields()
77 dsc_cfg->initial_offset = rc->initial_fullness_offset; in copy_rc_to_cfg()
/linux/drivers/media/test-drivers/vidtv/
A Dvidtv_mux.c158 u32 initial_offset = m->mux_buf_offset; in vidtv_mux_push_si() local
214 nbytes = m->mux_buf_offset - initial_offset; in vidtv_mux_push_si()
285 u32 initial_offset = m->mux_buf_offset; in vidtv_mux_packetize_access_units() local
318 nbytes = m->mux_buf_offset - initial_offset; in vidtv_mux_packetize_access_units()
356 u32 initial_offset = m->mux_buf_offset; in vidtv_mux_pad_with_nulls() local
370 nbytes = m->mux_buf_offset - initial_offset; in vidtv_mux_pad_with_nulls()
/linux/include/drm/display/
A Ddrm_dsc.h169 u16 initial_offset; member
442 __be16 initial_offset; member
/linux/drivers/gpu/drm/i915/display/
A Dintel_vdsc.c121 vdsc_cfg->initial_offset = 2048; in calculate_rc_params()
123 vdsc_cfg->initial_offset = 5632 - DIV_ROUND_UP(((bpp - 10) * 3584), 2); in calculate_rc_params()
125 vdsc_cfg->initial_offset = 6144 - DIV_ROUND_UP(((bpp - 8) * 512), 2); in calculate_rc_params()
127 vdsc_cfg->initial_offset = 6144; in calculate_rc_params()
344 (vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset); in intel_dsc_compute_params()
500 DSC_PPS8_INITIAL_OFFSET(vdsc_cfg->initial_offset); in intel_dsc_pps_configure()
908 vdsc_cfg->initial_offset = REG_FIELD_GET(DSC_PPS8_INITIAL_OFFSET_MASK, pps_temp); in intel_dsc_get_pps_config()
A Dintel_vdsc_regs.h143 #define DSC_PPS8_INITIAL_OFFSET(initial_offset) REG_FIELD_PREP(DSC_PPS8_INITIAL_OFFSET_MASK, \ argument
144 initial_offset)
A Dintel_display.c5464 PIPE_CONF_CHECK_I(dsc.config.initial_offset); in intel_pipe_config_compare()
/linux/drivers/nvdimm/
A Dbtt_devs.c280 nd_btt->initial_offset = 0; in nd_btt_version()
295 nd_btt->initial_offset = SZ_4K; in nd_btt_version()
A Dbtt.c36 return offset + nd_btt->initial_offset; in adjust_initial_offset()
1672 rawsize = size - nd_btt->initial_offset; in nvdimm_namespace_attach_btt()
1676 ARENA_MIN_SIZE + nd_btt->initial_offset); in nvdimm_namespace_attach_btt()
A Dnd.h456 int initial_offset; member
/linux/drivers/gpu/drm/msm/disp/dpu1/
A Ddpu_hw_dsc.c106 data = dsc->initial_offset << 16; in dpu_hw_dsc_config()
A Ddpu_hw_dsc_1_2.c193 data = (dsc->initial_offset & 0xffff) | in dpu_hw_dsc_config_1_2()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
A Ddcn20_dsc.c315 DC_LOG_DSC("\tinitial_offset %d", pps->initial_offset); in dsc_log_pps()
555 reg_vals->pps.initial_offset = 6144; in dsc_init_reg_values()
678 INITIAL_OFFSET, reg_vals->pps.initial_offset, in dsc_write_to_registers()
/linux/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
A Ddcn401_dsc.c318 INITIAL_OFFSET, reg_vals->pps.initial_offset, in dsc_write_to_registers()

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