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Searched refs:inst_mask (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
A Dmmhub_v1_8.c59 u32 inst_mask; in mmhub_v1_8_setup_vm_pt_regs() local
80 u32 inst_mask; in mmhub_v1_8_init_gart_aperture_regs() local
130 uint32_t tmp, inst_mask; in mmhub_v1_8_init_system_aperture_regs() local
193 uint32_t tmp, inst_mask; in mmhub_v1_8_init_tlb_regs() local
300 u32 inst_mask; in mmhub_v1_8_disable_identity_aperture() local
399 u32 i, j, inst_mask; in mmhub_v1_8_program_invalidation() local
435 u32 i, j, inst_mask; in mmhub_v1_8_gart_disable() local
472 u32 tmp, inst_mask; in mmhub_v1_8_set_fault_enable_default() local
518 u32 inst_mask; in mmhub_v1_8_init() local
663 uint32_t inst_mask; in mmhub_v1_8_query_ras_error_count() local
[all …]
A Dsdma_v4_4_2.c156 uint32_t inst_mask) in sdma_v4_4_2_inst_init_golden_registers() argument
620 uint32_t inst_mask) in sdma_v4_4_2_inst_enable() argument
874 uint32_t inst_mask) in sdma_v4_4_2_inst_load_microcode() argument
919 uint32_t inst_mask) in sdma_v4_4_2_inst_start() argument
944 tmp_mask = inst_mask; in sdma_v4_4_2_inst_start()
979 tmp_mask = inst_mask; in sdma_v4_4_2_inst_start()
1474 uint32_t inst_mask; in sdma_v4_4_2_hw_init() local
1488 uint32_t inst_mask; in sdma_v4_4_2_hw_fini() local
1821 uint32_t inst_mask; in sdma_v4_4_2_set_clockgating_state() local
2252 uint32_t inst_mask; in sdma_v4_4_2_query_ras_error_count() local
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A Damdgpu_xcp.h60 int (*prepare_suspend)(void *handle, uint32_t inst_mask);
61 int (*suspend)(void *handle, uint32_t inst_mask);
62 int (*prepare_resume)(void *handle, uint32_t inst_mask);
63 int (*resume)(void *handle, uint32_t inst_mask);
68 uint32_t inst_mask; member
138 uint32_t *inst_mask);
A Daqua_vanjaram.c75 uint32_t inst_mask; in aqua_vanjaram_set_xcp_id() local
83 inst_mask = 1 << inst_idx; in aqua_vanjaram_set_xcp_id()
104 if (adev->xcp_mgr->xcp[xcp_id].ip[ip_blk].inst_mask & inst_mask) { in aqua_vanjaram_set_xcp_id()
263 uint32_t inst_mask) in aqua_vanjaram_populate_ip_map() argument
267 while (inst_mask) { in aqua_vanjaram_populate_ip_map()
268 i = ffs(inst_mask) - 1; in aqua_vanjaram_populate_ip_map()
270 inst_mask &= ~(1 << i); in aqua_vanjaram_populate_ip_map()
281 { VCN_HWIP, adev->vcn.inst_mask }, in aqua_vanjaram_ip_map_init()
437 ip->inst_mask = in __aqua_vanjaram_get_xcp_ip_info()
691 inst_mask >>= adev->sdma.num_inst_per_aid; in aqua_vanjaram_init_soc_config()
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A Damdgpu_xcp.c33 int (*run_func)(void *handle, uint32_t inst_mask); in __amdgpu_xcp_run()
57 ret = run_func(xcp_mgr->adev, xcp_ip->inst_mask); in __amdgpu_xcp_run()
325 (xcp->ip[ip].inst_mask & BIT(instance))) in amdgpu_xcp_get_partition()
337 uint32_t *inst_mask) in amdgpu_xcp_get_inst_details() argument
339 if (!xcp->valid || !inst_mask || !(xcp->ip[ip].valid)) in amdgpu_xcp_get_inst_details()
342 *inst_mask = xcp->ip[ip].inst_mask; in amdgpu_xcp_get_inst_details()
A Dgfxhub_v1_2.c635 static int gfxhub_v1_2_xcp_resume(void *handle, uint32_t inst_mask) in gfxhub_v1_2_xcp_resume() argument
645 gfxhub_v1_2_xcc_set_fault_enable_default(adev, value, inst_mask); in gfxhub_v1_2_xcp_resume()
648 return gfxhub_v1_2_xcc_gart_enable(adev, inst_mask); in gfxhub_v1_2_xcp_resume()
653 static int gfxhub_v1_2_xcp_suspend(void *handle, uint32_t inst_mask) in gfxhub_v1_2_xcp_suspend() argument
658 gfxhub_v1_2_xcc_gart_disable(adev, inst_mask); in gfxhub_v1_2_xcp_suspend()
A Dnbio_v7_9.c422 u32 inst_mask; in nbio_v7_9_init_registers() local
430 inst_mask = adev->aid_mask & ~1U; in nbio_v7_9_init_registers()
431 for_each_inst(i, inst_mask) { in nbio_v7_9_init_registers()
A Damdgpu_kms.c572 u32 count, inst_mask; in amdgpu_info_ioctl() local
626 ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_GFX, &inst_mask); in amdgpu_info_ioctl()
629 count = hweight32(inst_mask); in amdgpu_info_ioctl()
632 ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_SDMA, &inst_mask); in amdgpu_info_ioctl()
635 count = hweight32(inst_mask); in amdgpu_info_ioctl()
638 ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_VCN, &inst_mask); in amdgpu_info_ioctl()
641 count = hweight32(inst_mask) * adev->jpeg.num_jpeg_rings; in amdgpu_info_ioctl()
644 ret = amdgpu_xcp_get_inst_details(xcp, AMDGPU_XCP_VCN, &inst_mask); in amdgpu_info_ioctl()
647 count = hweight32(inst_mask); in amdgpu_info_ioctl()
A Damdgpu_discovery.c368 adev->vcn.inst_mask &= ~AMDGPU_VCN_HARVEST_VCN1; in amdgpu_discovery_harvest_config_quirk()
638 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
640 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
644 adev->vcn.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
646 adev->jpeg.inst_mask &= in amdgpu_discovery_read_harvest_bit_per_ip()
698 adev->vcn.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
700 adev->jpeg.inst_mask &= in amdgpu_discovery_read_from_harvest_table()
1295 adev->vcn.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1296 adev->jpeg.inst_mask = 0; in amdgpu_discovery_reg_base_init()
1346 adev->vcn.inst_mask |= in amdgpu_discovery_reg_base_init()
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A Damdgpu_jpeg.h128 uint16_t inst_mask; member
A Damdgpu.h1397 #define for_each_inst(i, inst_mask) \ argument
1398 for (i = ffs(inst_mask); i-- != 0; \
1399 i = ffs(inst_mask & BIT_MASK_UPPER(i + 1)))
A Damdgpu_vcn.h330 uint16_t inst_mask; member
A Damdgpu_ras.c360 uint32_t mask, inst_mask = data->inject.instance_mask; in amdgpu_ras_instance_mask_check() local
363 if (num_xcc <= 1 && inst_mask) { in amdgpu_ras_instance_mask_check()
367 inst_mask); in amdgpu_ras_instance_mask_check()
384 mask = inst_mask; in amdgpu_ras_instance_mask_check()
390 if (inst_mask != data->inject.instance_mask) in amdgpu_ras_instance_mask_check()
393 inst_mask, data->inject.instance_mask); in amdgpu_ras_instance_mask_check()
A Dgmc_v9_0.c1997 unsigned long inst_mask = adev->aid_mask; in gmc_v9_0_sw_init() local
2093 inst_mask <<= AMDGPU_MMHUB0(0); in gmc_v9_0_sw_init()
2094 bitmap_or(adev->vmhubs_mask, adev->vmhubs_mask, &inst_mask, 32); in gmc_v9_0_sw_init()
A Dgfx_v9_4_3.c5003 static int gfx_v9_4_3_xcp_resume(void *handle, uint32_t inst_mask) in gfx_v9_4_3_xcp_resume() argument
5012 tmp_mask = inst_mask; in gfx_v9_4_3_xcp_resume()
5017 tmp_mask = inst_mask; in gfx_v9_4_3_xcp_resume()
5025 tmp_mask = inst_mask; in gfx_v9_4_3_xcp_resume()
5035 static int gfx_v9_4_3_xcp_suspend(void *handle, uint32_t inst_mask) in gfx_v9_4_3_xcp_suspend() argument
5040 for_each_inst(i, inst_mask) in gfx_v9_4_3_xcp_suspend()

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