| /linux/drivers/gpu/drm/i915/ |
| A D | vlv_suspend.c | 120 s->arb_mode = intel_uncore_read(uncore, ARB_MODE); in vlv_save_gunit_s0ix_state() 131 s->ecochk = intel_uncore_read(uncore, GAM_ECOCHK); in vlv_save_gunit_s0ix_state() 138 s->g3dctl = intel_uncore_read(uncore, VLV_G3DCTL); in vlv_save_gunit_s0ix_state() 140 s->mbctl = intel_uncore_read(uncore, GEN6_MBCTL); in vlv_save_gunit_s0ix_state() 154 s->ecobus = intel_uncore_read(uncore, ECOBUS); in vlv_save_gunit_s0ix_state() 163 s->gt_imr = intel_uncore_read(uncore, GTIMR); in vlv_save_gunit_s0ix_state() 164 s->gt_ier = intel_uncore_read(uncore, GTIER); in vlv_save_gunit_s0ix_state() 165 s->pm_imr = intel_uncore_read(uncore, GEN6_PMIMR); in vlv_save_gunit_s0ix_state() 166 s->pm_ier = intel_uncore_read(uncore, GEN6_PMIER); in vlv_save_gunit_s0ix_state() 172 s->tilectl = intel_uncore_read(uncore, TILECTL); in vlv_save_gunit_s0ix_state() [all …]
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| A D | intel_clock_gating.c | 90 intel_uncore_read(&i915->uncore, GEN9_CLKGATE_DIS_0) | in bxt_init_clock_gating() 118 intel_uncore_read(&i915->uncore, GEN9_CLKGATE_DIS_0) | in glk_init_clock_gating() 173 (intel_uncore_read(&i915->uncore, ILK_DISPLAY_CHICKEN2) | in ilk_init_clock_gating() 177 (intel_uncore_read(&i915->uncore, DISP_ARB_CTL) | in ilk_init_clock_gating() 220 val = intel_uncore_read(&i915->uncore, TRANS_CHICKEN2(pipe)); in cpt_init_clock_gating() 240 tmp = intel_uncore_read(&i915->uncore, MCH_SSKPD); in gen6_check_mch_setup() 256 intel_uncore_read(&i915->uncore, GEN6_UCGCTL1) | in gen6_init_clock_gating() 289 intel_uncore_read(&i915->uncore, ILK_DISPLAY_CHICKEN1) | in gen6_init_clock_gating() 292 intel_uncore_read(&i915->uncore, ILK_DISPLAY_CHICKEN2) | in gen6_init_clock_gating() 295 intel_uncore_read(&i915->uncore, ILK_DSPCLK_GATE_D) | in gen6_init_clock_gating() [all …]
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| A D | i915_gpu_error.c | 1230 intel_uncore_read(uncore, FENCE_REG(i)); in gt_record_fences() 1353 intel_uncore_read(engine->uncore, in engine_record_registers() 1357 intel_uncore_read(engine->uncore, in engine_record_registers() 1782 gt->ier = intel_uncore_read(uncore, DEIER); in gt_record_display_regs() 1801 intel_uncore_read(uncore, in gt_record_global_nonguc_regs() 1808 intel_uncore_read(uncore, in gt_record_global_nonguc_regs() 1811 intel_uncore_read(uncore, in gt_record_global_nonguc_regs() 1814 intel_uncore_read(uncore, in gt_record_global_nonguc_regs() 1827 gt->eir = intel_uncore_read(uncore, EIR); in gt_record_global_nonguc_regs() 1863 gt->fault_data0 = intel_uncore_read(uncore, in gt_record_global_regs() [all …]
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| A D | i915_debugfs.c | 350 intel_uncore_read(uncore, DCC)); in i915_swizzle_info() 352 intel_uncore_read(uncore, DCC2)); in i915_swizzle_info() 359 intel_uncore_read(uncore, MAD_DIMM_C0)); in i915_swizzle_info() 361 intel_uncore_read(uncore, MAD_DIMM_C1)); in i915_swizzle_info() 363 intel_uncore_read(uncore, MAD_DIMM_C2)); in i915_swizzle_info() 365 intel_uncore_read(uncore, TILECTL)); in i915_swizzle_info() 368 intel_uncore_read(uncore, GAMTARBMODE)); in i915_swizzle_info() 371 intel_uncore_read(uncore, ARB_MODE)); in i915_swizzle_info() 373 intel_uncore_read(uncore, DISP_ARB_CTL)); in i915_swizzle_info()
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| A D | i915_vgpu.c | 267 intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.base)); in intel_vgt_balloon() 269 intel_uncore_read(uncore, vgtif_reg(avail_rs.mappable_gmadr.size)); in intel_vgt_balloon() 271 intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.base)); in intel_vgt_balloon() 273 intel_uncore_read(uncore, vgtif_reg(avail_rs.nonmappable_gmadr.size)); in intel_vgt_balloon()
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| A D | i915_irq.c | 114 u32 val = intel_uncore_read(uncore, reg); in gen3_assert_iir_is_zero() 267 gt_iir = intel_uncore_read(&dev_priv->uncore, GTIIR); in valleyview_irq_handler() 269 iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR); in valleyview_irq_handler() 354 iir = intel_uncore_read(&dev_priv->uncore, VLV_IIR); in cherryview_irq_handler() 946 intel_uncore_read(&dev_priv->uncore, PGTBL_ER)); in i8xx_error_irq_handler() 954 *eir = intel_uncore_read(&dev_priv->uncore, EIR); in i9xx_error_irq_ack() 957 *eir_stuck = intel_uncore_read(&dev_priv->uncore, EIR); in i9xx_error_irq_ack() 971 emr = intel_uncore_read(&dev_priv->uncore, EMR); in i9xx_error_irq_ack() 986 intel_uncore_read(&dev_priv->uncore, PGTBL_ER)); in i9xx_error_irq_handler() 1109 iir = intel_uncore_read(&dev_priv->uncore, GEN2_IIR); in i915_irq_handler() [all …]
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| A D | i915_hwmon.c | 106 reg_value = intel_uncore_read(uncore, rgadr); in hwm_field_read_and_scale() 151 reg_val = intel_uncore_read(uncore, rgaddr); in hwm_energy() 176 r = intel_uncore_read(ddat->uncore, hwmon->rg.pkg_rapl_limit); in hwm_power1_max_interval_show() 336 reg_value = intel_uncore_read(ddat->uncore, hwmon->rg.gt_perf_status); in hwm_in_read() 382 r = intel_uncore_read(ddat->uncore, hwmon->rg.pkg_rapl_limit); in hwm_power_max_read() 444 nval = intel_uncore_read(ddat->uncore, hwmon->rg.pkg_rapl_limit); in hwm_power_max_write() 649 reg_val = intel_uncore_read(ddat->uncore, hwmon->rg.fan_speed); in hwm_fan_input_read() 834 val_sku_unit = intel_uncore_read(uncore, in hwm_get_preregistration_info() 842 ddat->fi.reg_val_prev = intel_uncore_read(uncore, in hwm_get_preregistration_info()
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| /linux/drivers/gpu/drm/i915/gt/ |
| A D | intel_sseu_debugfs.c | 24 sig1[0] = intel_uncore_read(uncore, CHV_POWER_SS0_SIG1); in cherryview_sseu_device_status() 25 sig1[1] = intel_uncore_read(uncore, CHV_POWER_SS1_SIG1); in cherryview_sseu_device_status() 26 sig2[0] = intel_uncore_read(uncore, CHV_POWER_SS0_SIG2); in cherryview_sseu_device_status() 27 sig2[1] = intel_uncore_read(uncore, CHV_POWER_SS1_SIG2); in cherryview_sseu_device_status() 65 s_reg[s] = intel_uncore_read(uncore, GEN10_SLICE_PGCTL_ACK(s)) & in gen11_sseu_device_status() 67 eu_reg[2 * s] = intel_uncore_read(uncore, in gen11_sseu_device_status() 69 eu_reg[2 * s + 1] = intel_uncore_read(uncore, in gen11_sseu_device_status() 119 s_reg[s] = intel_uncore_read(uncore, GEN9_SLICE_PGCTL_ACK(s)); in gen9_sseu_device_status() 121 intel_uncore_read(uncore, GEN9_SS01_EU_PGCTL_ACK(s)); in gen9_sseu_device_status() 123 intel_uncore_read(uncore, GEN9_SS23_EU_PGCTL_ACK(s)); in gen9_sseu_device_status() [all …]
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| A D | intel_rps.c | 336 total = intel_uncore_read(uncore, DMIEC); in __ips_chipset_val() 337 total += intel_uncore_read(uncore, DDREC); in __ips_chipset_val() 338 total += intel_uncore_read(uncore, CSIEC); in __ips_chipset_val() 357 tsfs = intel_uncore_read(uncore, TSFS); in ips_mch_val() 404 count = intel_uncore_read(uncore, GFXEC); in __gen5_ips_update() 1106 intel_uncore_read(uncore, MTL_RP_STATE_CAP); in mtl_get_freq_caps() 1108 intel_uncore_read(uncore, MTL_MPE_FREQUENCY) : in mtl_get_freq_caps() 1951 intel_uncore_read(uncore, MEMINTRSTS)); in gen5_rps_irq_handler() 1956 max_avg = intel_uncore_read(uncore, RCBMAXAVG); in gen5_rps_irq_handler() 1957 min_avg = intel_uncore_read(uncore, RCBMINAVG); in gen5_rps_irq_handler() [all …]
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| A D | intel_rc6.c | 300 pcbr = intel_uncore_read(uncore, VLV_PCBR); in chv_rc6_init() 322 pcbr = intel_uncore_read(uncore, VLV_PCBR); in vlv_rc6_init() 444 rc_ctl = intel_uncore_read(uncore, GEN6_RC_CONTROL); in bxt_check_bios_rc6_setup() 445 rc_sw_target = intel_uncore_read(uncore, GEN6_RC_STATE); in bxt_check_bios_rc6_setup() 464 intel_uncore_read(uncore, RC6_CTX_BASE) & RC6_CTX_BASE_MASK; in bxt_check_bios_rc6_setup() 480 if (!intel_uncore_read(uncore, GEN8_PUSHBUS_CONTROL) || in bxt_check_bios_rc6_setup() 481 !intel_uncore_read(uncore, GEN8_PUSHBUS_ENABLE) || in bxt_check_bios_rc6_setup() 482 !intel_uncore_read(uncore, GEN8_PUSHBUS_SHIFT)) { in bxt_check_bios_rc6_setup() 487 if (!intel_uncore_read(uncore, GEN6_GFXPAUSE)) { in bxt_check_bios_rc6_setup() 492 if (!intel_uncore_read(uncore, GEN8_MISC_CTRL0)) { in bxt_check_bios_rc6_setup() [all …]
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| A D | intel_gt_pm_debugfs.c | 97 pw_status = intel_uncore_read(uncore, VLV_GTLC_PW_STATUS); in vlv_drpc() 98 rcctl1 = intel_uncore_read(uncore, GEN6_RC_CONTROL); in vlv_drpc() 126 rcctl1 = intel_uncore_read(uncore, GEN6_RC_CONTROL); in gen6_drpc() 129 intel_uncore_read(uncore, GEN9_PG_ENABLE); in gen6_drpc() 131 intel_uncore_read(uncore, GEN9_PWRGT_DOMAIN_STATUS); in gen6_drpc() 211 rgvmodectl = intel_uncore_read(uncore, MEMMODECTL); in ilk_drpc() 212 rstdbyctl = intel_uncore_read(uncore, RSTDBYCTL); in ilk_drpc() 273 rcctl1 = intel_uncore_read(uncore, GEN6_RC_CONTROL); in mtl_drpc() 274 mtl_powergate_enable = intel_uncore_read(uncore, GEN9_PG_ENABLE); in mtl_drpc() 275 mtl_powergate_status = intel_uncore_read(uncore, in mtl_drpc() [all …]
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| A D | intel_sseu.c | 272 s_en = intel_uncore_read(uncore, GEN11_GT_SLICE_ENABLE) & in gen12_sseu_info_init() 279 eu_en_fuse = ~(intel_uncore_read(uncore, GEN11_EU_DISABLE) & in gen12_sseu_info_init() 309 s_en = intel_uncore_read(uncore, GEN11_GT_SLICE_ENABLE) & in gen11_sseu_info_init() 315 eu_en = ~(intel_uncore_read(uncore, GEN11_EU_DISABLE) & in gen11_sseu_info_init() 331 fuse = intel_uncore_read(gt->uncore, CHV_FUSE_GT); in cherryview_sseu_info_init() 387 fuse2 = intel_uncore_read(uncore, GEN8_FUSE2); in gen9_sseu_info_init() 492 fuse2 = intel_uncore_read(uncore, GEN8_FUSE2); in bdw_sseu_info_init() 503 eu_disable0 = intel_uncore_read(uncore, GEN8_EU_DISABLE0); in bdw_sseu_info_init() 504 eu_disable1 = intel_uncore_read(uncore, GEN8_EU_DISABLE1); in bdw_sseu_info_init() 505 eu_disable2 = intel_uncore_read(uncore, GEN8_EU_DISABLE2); in bdw_sseu_info_init() [all …]
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| A D | intel_gt_clock_utils.c | 16 u32 ts_override = intel_uncore_read(uncore, GEN9_TIMESTAMP_OVERRIDE); in read_reference_ts_freq() 59 u32 ctc_reg = intel_uncore_read(uncore, CTC_MODE); in gen11_read_clock_frequency() 74 u32 c0 = intel_uncore_read(uncore, RPM_CONFIG0); in gen11_read_clock_frequency() 92 u32 ctc_reg = intel_uncore_read(uncore, CTC_MODE); in gen9_read_clock_frequency()
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| A D | selftest_rps.c | 209 intel_uncore_read(rps_to_uncore(rps), in show_pstate_limits() 214 intel_uncore_read(rps_to_uncore(rps), in show_pstate_limits() 944 timeout = intel_uncore_read(uncore, GEN6_RP_UP_EI); in __rps_up_interrupt() 963 intel_uncore_read(uncore, GEN6_RP_PREV_UP), in __rps_up_interrupt() 964 intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD), in __rps_up_interrupt() 965 intel_uncore_read(uncore, GEN6_RP_UP_EI)); in __rps_up_interrupt() 992 timeout = intel_uncore_read(uncore, GEN6_RP_DOWN_EI); in __rps_down_interrupt() 1008 intel_uncore_read(uncore, GEN6_RP_PREV_DOWN), in __rps_down_interrupt() 1010 intel_uncore_read(uncore, GEN6_RP_DOWN_EI), in __rps_down_interrupt() 1011 intel_uncore_read(uncore, GEN6_RP_PREV_UP), in __rps_down_interrupt() [all …]
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| A D | intel_wopcm.c | 203 u32 reg_base = intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET); in __wopcm_regs_locked() 204 u32 reg_size = intel_uncore_read(uncore, GUC_WOPCM_SIZE); in __wopcm_regs_locked() 220 return intel_uncore_read(uncore, GUC_SHIM_CONTROL2) & GUC_IS_PRIVILEGED; in __wopcm_regs_writable()
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| A D | intel_ggtt_fencing.c | 590 if (intel_uncore_read(uncore, DISP_ARB_CTL) & in detect_bit_6_swizzle() 601 dimm_c0 = intel_uncore_read(uncore, MAD_DIMM_C0); in detect_bit_6_swizzle() 602 dimm_c1 = intel_uncore_read(uncore, MAD_DIMM_C1); in detect_bit_6_swizzle() 668 u32 dcc = intel_uncore_read(uncore, DCC); in detect_bit_6_swizzle() 707 !(intel_uncore_read(uncore, DCC2) & DCC2_MODIFIED_ENHANCED_DISABLE)) { in detect_bit_6_swizzle() 863 num_fences = intel_uncore_read(uncore, in intel_ggtt_init_fences()
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| A D | intel_gt_mcr.c | 125 (intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3) & in intel_gt_mcr_init() 139 intel_uncore_read(gt->uncore, in intel_gt_mcr_init() 143 intel_uncore_read(gt->uncore, XEHP_FUSE4)); in intel_gt_mcr_init() 167 ~intel_uncore_read(gt->uncore, GEN10_MIRROR_FUSE3) & in intel_gt_mcr_init() 739 return intel_uncore_read(gt->uncore, mcr_reg_cast(reg)); in intel_gt_mcr_read_any()
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| A D | intel_engine_cs.c | 299 cxt_size = intel_uncore_read(uncore, GEN7_CXT_SIZE); in intel_engine_context_size() 303 cxt_size = intel_uncore_read(uncore, CXT_SIZE); in intel_engine_context_size() 318 cxt_size = intel_uncore_read(uncore, CXT_SIZE) + 1; in intel_engine_context_size() 777 fuse1 = intel_uncore_read(gt->uncore, HSW_PAVP_FUSE1); in engine_mask_apply_media_fuses() 1785 intel_uncore_read(uncore, RING_INSTDONE(mmio_base)); in intel_engine_get_instdone() 1791 intel_uncore_read(uncore, GEN7_SC_INSTDONE); in intel_engine_get_instdone() 1794 intel_uncore_read(uncore, GEN12_SC_INSTDONE_EXTRA); in intel_engine_get_instdone() 1825 intel_uncore_read(uncore, GEN7_SC_INSTDONE); in intel_engine_get_instdone() 1827 intel_uncore_read(uncore, GEN7_SAMPLER_INSTDONE); in intel_engine_get_instdone() 1829 intel_uncore_read(uncore, GEN7_ROW_INSTDONE); in intel_engine_get_instdone() [all …]
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| /linux/drivers/gpu/drm/i915/display/ |
| A D | intel_display_irq.c | 90 old_val = intel_uncore_read(&dev_priv->uncore, GEN8_DE_PORT_IMR); in bdw_update_port_irq() 156 u32 sdeimr = intel_uncore_read(&dev_priv->uncore, SDEIMR); in ibx_display_interrupt_update() 385 res1 = intel_uncore_read(&dev_priv->uncore, in i9xx_pipe_crc_irq_handler() 391 res2 = intel_uncore_read(&dev_priv->uncore, in i9xx_pipe_crc_irq_handler() 611 intel_uncore_read(&dev_priv->uncore, FDI_RX_IIR(pipe))); in ibx_irq_handler() 697 intel_uncore_read(&dev_priv->uncore, FDI_RX_IIR(pipe))); in cpt_irq_handler() 738 u32 pch_iir = intel_uncore_read(&dev_priv->uncore, SDEIIR); in ilk_display_irq_handler() 795 u32 pch_iir = intel_uncore_read(&dev_priv->uncore, SDEIIR); in ivb_display_irq_handler() 922 u32 val = intel_uncore_read(&dev_priv->uncore, in gen8_de_misc_irq_handler() 975 val = intel_uncore_read(&dev_priv->uncore, in gen11_dsi_te_interrupt_handler() [all …]
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| A D | i9xx_wm.c | 271 dsparb = intel_uncore_read(&dev_priv->uncore, in vlv_get_fifo_size() 273 dsparb2 = intel_uncore_read(&dev_priv->uncore, DSPARB2); in vlv_get_fifo_size() 278 dsparb = intel_uncore_read(&dev_priv->uncore, in vlv_get_fifo_size() 280 dsparb2 = intel_uncore_read(&dev_priv->uncore, DSPARB2); in vlv_get_fifo_size() 285 dsparb2 = intel_uncore_read(&dev_priv->uncore, DSPARB2); in vlv_get_fifo_size() 286 dsparb3 = intel_uncore_read(&dev_priv->uncore, DSPARB3); in vlv_get_fifo_size() 2644 sskpd = intel_uncore_read(&i915->uncore, MCH_SSKPD); in snb_read_wm_latency() 2658 mltr = intel_uncore_read(&i915->uncore, MLTR_ILK); in ilk_read_wm_latency() 3594 tmp = intel_uncore_read(&dev_priv->uncore, DSPHOWM); in vlv_read_wm_values() 3606 tmp = intel_uncore_read(&dev_priv->uncore, DSPFW7); in vlv_read_wm_values() [all …]
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| /linux/drivers/gpu/drm/i915/gt/uc/ |
| A D | intel_guc_fw.c | 99 u32 val = intel_uncore_read(uncore, GUC_STATUS); in guc_load_done() 218 intel_uncore_read(uncore, GUC_HEADER_INFO)); in guc_wait_ucode() 236 intel_uncore_read(uncore, SOFT_SCRATCH(13))); in guc_wait_ucode() 264 intel_uncore_read(uncore, intel_gt_perf_limit_reasons_reg(gt))); in guc_wait_ucode()
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| A D | intel_uc.c | 73 guc_status = intel_uncore_read(gt->uncore, GUC_STATUS); in __intel_uc_reset_hw() 193 val = intel_uncore_read(guc_to_gt(guc)->uncore, SOFT_SCRATCH(15)); in guc_get_mmio_msg() 407 intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET)); in uc_init_wopcm() 410 intel_uncore_read(uncore, GUC_WOPCM_SIZE)); in uc_init_wopcm() 420 return (intel_uncore_read(uncore, GUC_WOPCM_SIZE) & GUC_WOPCM_SIZE_LOCKED) || in uc_is_wopcm_locked() 421 (intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET) & GUC_WOPCM_OFFSET_VALID); in uc_is_wopcm_locked()
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| A D | intel_guc.c | 99 guc_WARN_ON_ONCE(guc, intel_uncore_read(gt->uncore, GEN8_GT_IIR(2)) & in gen9_enable_guc_interrupts() 396 stamp = intel_uncore_read(gt->uncore, GUCPMTIMESTAMP); in intel_guc_dump_time_info() 539 #define done ({ header = intel_uncore_read(uncore, guc_send_reg(guc, 0)); \ in intel_guc_send_mmio() 586 response_buf[i] = intel_uncore_read(uncore, in intel_guc_send_mmio() 918 u32 status = intel_uncore_read(uncore, GUC_STATUS); in intel_guc_load_status() 931 i, intel_uncore_read(uncore, SOFT_SCRATCH(i))); in intel_guc_load_status()
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| /linux/drivers/gpu/drm/i915/soc/ |
| A D | intel_dram.c | 48 return intel_uncore_read(&i915->uncore, CSHRDDR3CTL) & CSHRDDR3CTL_DDR3; in pnv_is_ddr3() 55 tmp = intel_uncore_read(&dev_priv->uncore, CLKCFG); in pnv_mem_freq() 157 fsb = intel_uncore_read(&i915->uncore, CLKCFG) & CLKCFG_FSB_MASK; in i9xx_fsb_freq() 385 val = intel_uncore_read(&i915->uncore, in skl_dram_get_channels_info() 391 val = intel_uncore_read(&i915->uncore, in skl_dram_get_channels_info() 422 val = intel_uncore_read(&i915->uncore, in skl_get_dram_type() 549 val = intel_uncore_read(&i915->uncore, BXT_D_CR_DRP0_DUNIT(i)); in bxt_get_dram_info() 664 u32 val = intel_uncore_read(&i915->uncore, MTL_MEM_SS_INFO_GLOBAL); in xelpdp_get_dram_info()
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| /linux/drivers/gpu/drm/i915/gem/ |
| A D | i915_gem_stolen.c | 106 ggtt_start = intel_uncore_read(uncore, PGTBL_CTL); in adjust_stolen() 208 u32 reg_val = intel_uncore_read(uncore, in g4x_get_stolen_reserved() 243 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); in gen6_get_stolen_reserved() 276 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); in vlv_get_stolen_reserved() 305 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); in gen7_get_stolen_reserved() 332 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); in chv_get_stolen_reserved() 365 u32 reg_val = intel_uncore_read(uncore, GEN6_STOLEN_RESERVED); in bdw_get_stolen_reserved()
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