| /linux/drivers/net/ethernet/marvell/octeon_ep/ |
| A D | octep_tx.c | 45 iq->octep_read_index = oct->hw_ops.update_iq_read_idx(iq); in octep_iq_process_completions() 94 netif_wake_subqueue(iq->netdev, iq->q_no); in octep_iq_process_completions() 181 iq = vzalloc(sizeof(*iq)); in octep_setup_iq() 182 if (!iq) in octep_setup_iq() 184 oct->iq[q_no] = iq; in octep_setup_iq() 191 iq->ring_size_mask = iq->max_count - 1; in octep_setup_iq() 244 dma_free_coherent(iq->dev, sglist_size, iq->sglist, iq->sglist_dma); in octep_setup_iq() 247 iq->desc_ring, iq->desc_ring_dma); in octep_setup_iq() 249 vfree(iq); in octep_setup_iq() 274 iq->desc_ring, iq->desc_ring_dma); in octep_free_iq() [all …]
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| A D | octep_main.c | 65 ioq_vector->iq = oct->iq[i]; in octep_alloc_ioq_vectors() 569 writel(iq->pkts_processed, iq->inst_cnt_reg); in octep_enable_ioq_irq() 570 iq->pkt_in_done -= iq->pkts_processed; in octep_enable_ioq_irq() 810 netif_stop_subqueue(iq->netdev, iq->q_no); in octep_iq_full_check() 824 netif_start_subqueue(iq->netdev, iq->q_no); in octep_iq_full_check() 866 iq = oct->iq[q_no]; in octep_start_xmit() 948 iq->host_write_index = wi & iq->ring_size_mask; in octep_start_xmit() 956 iq->fill_cnt < iq->fill_threshold) in octep_start_xmit() 962 writel(iq->fill_cnt, iq->doorbell_reg); in octep_start_xmit() 963 iq->stats.instr_posted += iq->fill_cnt; in octep_start_xmit() [all …]
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| A D | octep_main.h | 50 #define IQ_INSTR_PENDING(iq) ({ typeof(iq) iq__ = (iq); \ argument 54 #define IQ_INSTR_SPACE(iq) ({ typeof(iq) iq_ = (iq); \ argument 97 u32 (*update_iq_read_idx)(struct octep_iq *iq); 150 struct octep_iq *iq; member 258 struct octep_iq *iq[OCTEP_MAX_IQ]; member 403 int octep_iq_process_completions(struct octep_iq *iq, u16 budget);
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| A D | octep_config.h | 60 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) 61 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs) 62 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) 64 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) 65 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cfg)->iq.intr_threshold) 232 struct octep_iq_config iq; member
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| A D | octep_cn9k_pf.c | 233 conf->iq.instr_type = OCTEP_64BYTE_INSTR; in octep_init_config_cn93_pf() 234 conf->iq.db_min = OCTEP_DB_MIN; in octep_init_config_cn93_pf() 265 struct octep_iq *iq = oct->iq[iq_no]; in octep_setup_iq_regs_cn93_pf() local 286 iq->desc_ring_dma); in octep_setup_iq_regs_cn93_pf() 288 iq->max_count); in octep_setup_iq_regs_cn93_pf() 293 iq->doorbell_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cn93_pf() 295 iq->inst_cnt_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cn93_pf() 297 iq->intr_lvl_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cn93_pf() 301 reset_instr_cnt = readl(iq->inst_cnt_reg); in octep_setup_iq_regs_cn93_pf() 731 iq->pkt_in_done = pkt_in_done; in octep_update_iq_read_index_cn93_pf() [all …]
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| A D | octep_cnxk_pf.c | 252 conf->iq.instr_type = OCTEP_64BYTE_INSTR; in octep_init_config_cnxk_pf() 253 conf->iq.db_min = OCTEP_DB_MIN; in octep_init_config_cnxk_pf() 285 struct octep_iq *iq = oct->iq[iq_no]; in octep_setup_iq_regs_cnxk_pf() local 306 iq->desc_ring_dma); in octep_setup_iq_regs_cnxk_pf() 308 iq->max_count); in octep_setup_iq_regs_cnxk_pf() 313 iq->doorbell_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cnxk_pf() 315 iq->inst_cnt_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cnxk_pf() 317 iq->intr_lvl_reg = oct->mmio[0].hw_addr + in octep_setup_iq_regs_cnxk_pf() 321 reset_instr_cnt = readl(iq->inst_cnt_reg); in octep_setup_iq_regs_cnxk_pf() 754 iq->pkt_in_done = pkt_in_done; in octep_update_iq_read_index_cnxk_pf() [all …]
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| A D | octep_ethtool.c | 161 struct octep_iq *iq = oct->iq[q]; in octep_get_ethtool_stats() local 164 tx_packets += iq->stats.instr_completed; in octep_get_ethtool_stats() 165 tx_bytes += iq->stats.bytes_sent; in octep_get_ethtool_stats() 166 tx_busy_errors += iq->stats.tx_busy; in octep_get_ethtool_stats() 209 struct octep_iq *iq = oct->iq[q]; in octep_get_ethtool_stats() local 211 data[i++] = iq->stats.instr_posted; in octep_get_ethtool_stats() 212 data[i++] = iq->stats.instr_completed; in octep_get_ethtool_stats() 213 data[i++] = iq->stats.bytes_sent; in octep_get_ethtool_stats() 214 data[i++] = iq->stats.tx_busy; in octep_get_ethtool_stats()
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| /linux/drivers/net/ethernet/marvell/octeon_ep_vf/ |
| A D | octep_vf_tx.c | 180 iq = vzalloc(sizeof(*iq)); in octep_vf_setup_iq() 181 if (!iq) in octep_vf_setup_iq() 183 oct->iq[q_no] = iq; in octep_vf_setup_iq() 190 iq->ring_size_mask = iq->max_count - 1; in octep_vf_setup_iq() 192 iq->netdev_q = netdev_get_tx_queue(iq->netdev, q_no); in octep_vf_setup_iq() 243 dma_free_coherent(iq->dev, sglist_size, iq->sglist, iq->sglist_dma); in octep_vf_setup_iq() 246 iq->desc_ring, iq->desc_ring_dma); in octep_vf_setup_iq() 248 vfree(iq); in octep_vf_setup_iq() 273 iq->desc_ring, iq->desc_ring_dma); in octep_vf_free_iq() 279 iq->sglist, iq->sglist_dma); in octep_vf_free_iq() [all …]
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| A D | octep_vf_main.c | 64 ioq_vector->iq = oct->iq[i]; in octep_vf_alloc_ioq_vectors() 300 netdev_dbg(iq->netdev, "enabling intr for Q-%u\n", iq->q_no); in octep_vf_enable_ioq_irq() 302 writel(iq->pkts_processed, iq->inst_cnt_reg); in octep_vf_enable_ioq_irq() 303 iq->pkt_in_done -= iq->pkts_processed; in octep_vf_enable_ioq_irq() 565 ret = netif_subqueue_maybe_stop(iq->netdev, iq->q_no, IQ_INSTR_SPACE(iq), in octep_vf_iq_full_check() 620 iq = oct->iq[q_no]; in octep_vf_start_xmit() 702 iq->host_write_index = wi & iq->ring_size_mask; in octep_vf_start_xmit() 710 iq->fill_cnt < iq->fill_threshold) in octep_vf_start_xmit() 733 writel(iq->fill_cnt, iq->doorbell_reg); in octep_vf_start_xmit() 734 iq->stats.instr_posted += iq->fill_cnt; in octep_vf_start_xmit() [all …]
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| A D | octep_vf_main.h | 35 #define IQ_INSTR_PENDING(iq) ({ typeof(iq) iq__ = (iq); \ argument 39 #define IQ_INSTR_SPACE(iq) ({ typeof(iq) iq_ = (iq); \ argument 64 u32 (*update_iq_read_idx)(struct octep_vf_iq *iq); 126 struct octep_vf_iq *iq; member 247 struct octep_vf_iq *iq[OCTEP_VF_MAX_IQ]; member 328 int octep_vf_iq_process_completions(struct octep_vf_iq *iq, u16 budget);
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| A D | octep_vf_config.h | 56 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) 57 #define CFG_GET_IQ_NUM_DESC(cfg) ((cfg)->iq.num_descs) 58 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) 60 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) 61 #define CFG_GET_IQ_INTR_THRESHOLD(cfg) ((cfg)->iq.intr_threshold) 149 struct octep_vf_iq_config iq; member
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| A D | octep_vf_cn9k.c | 146 conf->iq.num_descs = OCTEP_VF_IQ_MAX_DESCRIPTORS; in octep_vf_init_config_cn93_vf() 147 conf->iq.instr_type = OCTEP_VF_64BYTE_INSTR; in octep_vf_init_config_cn93_vf() 148 conf->iq.db_min = OCTEP_VF_DB_MIN; in octep_vf_init_config_cn93_vf() 149 conf->iq.intr_threshold = OCTEP_VF_IQ_INTR_THRESHOLD; in octep_vf_init_config_cn93_vf() 163 struct octep_vf_iq *iq = oct->iq[iq_no]; in octep_vf_setup_iq_regs_cn93() local 190 reset_instr_cnt = readl(iq->inst_cnt_reg); in octep_vf_setup_iq_regs_cn93() 191 writel(reset_instr_cnt, iq->inst_cnt_reg); in octep_vf_setup_iq_regs_cn93() 354 u32 pkt_in_done = readl(iq->inst_cnt_reg); in octep_vf_update_iq_read_index_cn93() 357 last_done = pkt_in_done - iq->pkt_in_done; in octep_vf_update_iq_read_index_cn93() 358 iq->pkt_in_done = pkt_in_done; in octep_vf_update_iq_read_index_cn93() [all …]
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| A D | octep_vf_cnxk.c | 148 conf->iq.num_descs = OCTEP_VF_IQ_MAX_DESCRIPTORS; in octep_vf_init_config_cnxk_vf() 149 conf->iq.instr_type = OCTEP_VF_64BYTE_INSTR; in octep_vf_init_config_cnxk_vf() 150 conf->iq.db_min = OCTEP_VF_DB_MIN; in octep_vf_init_config_cnxk_vf() 151 conf->iq.intr_threshold = OCTEP_VF_IQ_INTR_THRESHOLD; in octep_vf_init_config_cnxk_vf() 166 struct octep_vf_iq *iq = oct->iq[iq_no]; in octep_vf_setup_iq_regs_cnxk() local 193 reset_instr_cnt = readl(iq->inst_cnt_reg); in octep_vf_setup_iq_regs_cnxk() 194 writel(reset_instr_cnt, iq->inst_cnt_reg); in octep_vf_setup_iq_regs_cnxk() 365 u32 pkt_in_done = readl(iq->inst_cnt_reg); in octep_vf_update_iq_read_index_cnxk() 368 last_done = pkt_in_done - iq->pkt_in_done; in octep_vf_update_iq_read_index_cnxk() 369 iq->pkt_in_done = pkt_in_done; in octep_vf_update_iq_read_index_cnxk() [all …]
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| A D | octep_vf_ethtool.c | 125 struct octep_vf_iq *iq = oct->iq[q]; in octep_vf_get_ethtool_stats() local 128 tx_busy_errors += iq->stats.tx_busy; in octep_vf_get_ethtool_stats() 145 struct octep_vf_iq *iq = oct->iq[q]; in octep_vf_get_ethtool_stats() local 147 data[i++] = iq->stats.instr_posted; in octep_vf_get_ethtool_stats() 148 data[i++] = iq->stats.instr_completed; in octep_vf_get_ethtool_stats() 149 data[i++] = iq->stats.bytes_sent; in octep_vf_get_ethtool_stats() 150 data[i++] = iq->stats.tx_busy; in octep_vf_get_ethtool_stats()
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| /linux/drivers/crypto/cavium/zip/ |
| A D | zip_device.c | 59 return ((zip_dev->iq[queue].sw_head - zip_dev->iq[queue].sw_tail) * in zip_cmd_queue_consumed() 128 zip_dev->iq[queue].sw_head = zip_dev->iq[queue].sw_tail; in zip_load_instr() 139 zip_dev->iq[queue].pend_cnt++; in zip_load_instr() 151 zip_dev->iq[queue].sw_head, zip_dev->iq[queue].sw_tail, in zip_load_instr() 152 zip_dev->iq[queue].hw_tail); in zip_load_instr() 155 zip_dev->iq[queue].pend_cnt); in zip_load_instr() 187 zip_dev->iq[queue].hw_tail = zip_dev->iq[queue].sw_head; in zip_update_cmd_bufs() 193 zip_dev->iq[queue].done_cnt++; in zip_update_cmd_bufs() 194 zip_dev->iq[queue].pend_cnt--; in zip_update_cmd_bufs() 197 zip_dev->iq[queue].sw_head, zip_dev->iq[queue].sw_tail, in zip_update_cmd_bufs() [all …]
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| A D | zip_mem.c | 59 zip->iq[q].sw_head = (u64 *)__get_free_pages((GFP_KERNEL | GFP_DMA), in zip_cmd_qbuf_alloc() 62 if (!zip->iq[q].sw_head) in zip_cmd_qbuf_alloc() 65 memset(zip->iq[q].sw_head, 0, ZIP_CMD_QBUF_SIZE); in zip_cmd_qbuf_alloc() 67 zip_dbg("cmd_qbuf_alloc[%d] Success : %p\n", q, zip->iq[q].sw_head); in zip_cmd_qbuf_alloc() 78 zip_dbg("Freeing cmd_qbuf 0x%lx\n", zip->iq[q].sw_tail); in zip_cmd_qbuf_free() 80 free_pages((u64)zip->iq[q].sw_tail, get_order(ZIP_CMD_QBUF_SIZE)); in zip_cmd_qbuf_free()
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| A D | zip_main.c | 172 memset(&zip->iq[q], 0x0, sizeof(struct zip_iq)); in zip_init_hw() 174 spin_lock_init(&zip->iq[q].lock); in zip_init_hw() 185 zip->iq[q].sw_tail = zip->iq[q].sw_head; in zip_init_hw() 186 zip->iq[q].hw_tail = zip->iq[q].sw_head; in zip_init_hw() 190 que_sbuf_addr.s.ptr = (__pa(zip->iq[q].sw_head) >> in zip_init_hw() 203 zip->iq[q].sw_head, zip->iq[q].sw_tail, in zip_init_hw() 204 zip->iq[q].hw_tail); in zip_init_hw()
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| /linux/drivers/net/ethernet/cavium/liquidio/ |
| A D | request_manager.c | 77 iq->base_addr = lio_dma_alloc(oct, q_size, &iq->base_addr_dma); in octeon_init_instr_queue() 94 lio_dma_free(oct, q_size, iq->base_addr, iq->base_addr_dma); in octeon_init_instr_queue() 101 iq_no, iq->base_addr, &iq->base_addr_dma, iq->max_count); in octeon_init_instr_queue() 140 lio_dma_free(oct, q_size, iq->base_addr, iq->base_addr_dma); in octeon_init_instr_queue() 268 writel(iq->fill_cnt, iq->doorbell_reg); in ring_doorbell() 295 iqptr = iq->base_addr + (cmdsize * iq->host_write_index); in __copy_cmd_into_iq() 323 iq->host_write_index = incr_index(iq->host_write_index, 1, in __post_command2() 453 iq->octeon_read_index = oct->fn_list.update_iq_read_idx(iq); in octeon_flush_iq() 457 if (iq->flush_index == iq->octeon_read_index) in octeon_flush_iq() 502 if (!iq) in __check_db_timeout() [all …]
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| A D | cn23xx_vf_regs.h | 70 #define CN23XX_VF_SLI_IQ_PKT_CONTROL64(iq) \ argument 71 (CN23XX_VF_SLI_IQ_PKT_CONTROL_START64 + ((iq) * CN23XX_VF_IQ_OFFSET)) 73 #define CN23XX_VF_SLI_IQ_BASE_ADDR64(iq) \ argument 74 (CN23XX_VF_SLI_IQ_BASE_ADDR_START64 + ((iq) * CN23XX_VF_IQ_OFFSET)) 76 #define CN23XX_VF_SLI_IQ_SIZE(iq) \ argument 77 (CN23XX_VF_SLI_IQ_SIZE_START + ((iq) * CN23XX_VF_IQ_OFFSET)) 79 #define CN23XX_VF_SLI_IQ_DOORBELL(iq) \ argument 80 (CN23XX_VF_SLI_IQ_DOORBELL_START + ((iq) * CN23XX_VF_IQ_OFFSET)) 82 #define CN23XX_VF_SLI_IQ_INSTR_COUNT64(iq) \ argument 83 (CN23XX_VF_SLI_IQ_INSTR_COUNT_START64 + ((iq) * CN23XX_VF_IQ_OFFSET))
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| A D | cn66xx_regs.h | 143 #define CN6XXX_SLI_IQ_BASE_ADDR64(iq) \ argument 144 (CN6XXX_SLI_IQ_BASE_ADDR_START64 + ((iq) * CN6XXX_IQ_OFFSET)) 146 #define CN6XXX_SLI_IQ_SIZE(iq) \ argument 147 (CN6XXX_SLI_IQ_SIZE_START + ((iq) * CN6XXX_IQ_OFFSET)) 149 #define CN6XXX_SLI_IQ_PKT_INSTR_HDR64(iq) \ argument 152 #define CN6XXX_SLI_IQ_DOORBELL(iq) \ argument 153 (CN6XXX_SLI_IQ_DOORBELL_START + ((iq) * CN6XXX_IQ_OFFSET)) 155 #define CN6XXX_SLI_IQ_INSTR_COUNT(iq) \ argument 156 (CN6XXX_SLI_IQ_INSTR_COUNT_START + ((iq) * CN6XXX_IQ_OFFSET)) 158 #define CN66XX_SLI_IQ_BP64(iq) \ argument [all …]
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| A D | cn23xx_vf_device.c | 104 struct octeon_instr_queue *iq; in cn23xx_vf_setup_global_input_regs() local 116 iq = oct->instr_queue[q_no]; in cn23xx_vf_setup_global_input_regs() 118 if (iq) in cn23xx_vf_setup_global_input_regs() 219 iq->base_addr_dma); in cn23xx_setup_vf_iq_regs() 225 iq->doorbell_reg = in cn23xx_setup_vf_iq_regs() 227 iq->inst_cnt_reg = in cn23xx_setup_vf_iq_regs() 230 iq_no, iq->doorbell_reg, iq->inst_cnt_reg); in cn23xx_setup_vf_iq_regs() 240 iq->inst_cnt_reg); in cn23xx_setup_vf_iq_regs() 242 iq->reset_instr_cnt = 0; in cn23xx_setup_vf_iq_regs() 531 iq->pkt_in_done = pkt_in_done; in cn23xx_update_read_index() [all …]
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| A D | cn23xx_pf_regs.h | 170 #define CN23XX_SLI_IQ_PKT_CONTROL64(iq) \ argument 171 (CN23XX_SLI_IQ_PKT_CONTROL_START64 + ((iq) * CN23XX_IQ_OFFSET)) 173 #define CN23XX_SLI_IQ_BASE_ADDR64(iq) \ argument 174 (CN23XX_SLI_IQ_BASE_ADDR_START64 + ((iq) * CN23XX_IQ_OFFSET)) 176 #define CN23XX_SLI_IQ_SIZE(iq) \ argument 177 (CN23XX_SLI_IQ_SIZE_START + ((iq) * CN23XX_IQ_OFFSET)) 179 #define CN23XX_SLI_IQ_DOORBELL(iq) \ argument 180 (CN23XX_SLI_IQ_DOORBELL_START + ((iq) * CN23XX_IQ_OFFSET)) 182 #define CN23XX_SLI_IQ_INSTR_COUNT64(iq) \ argument 183 (CN23XX_SLI_IQ_INSTR_COUNT_START64 + ((iq) * CN23XX_IQ_OFFSET))
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| A D | cn66xx_device.c | 272 iq->base_addr_dma); in lio_cn6xxx_setup_iq_regs() 282 iq_no, iq->doorbell_reg, iq->inst_cnt_reg); in lio_cn6xxx_setup_iq_regs() 287 iq->reset_instr_cnt = readl(iq->inst_cnt_reg); in lio_cn6xxx_setup_iq_regs() 339 mask |= oct->io_qmask.iq; in lio_cn6xxx_enable_io_queues() 357 mask ^= oct->io_qmask.iq; in lio_cn6xxx_disable_io_queues() 361 mask = (u32)oct->io_qmask.iq; in lio_cn6xxx_disable_io_queues() 370 if (!(oct->io_qmask.iq & BIT_ULL(i))) in lio_cn6xxx_disable_io_queues() 451 u32 new_idx = readl(iq->inst_cnt_reg); in lio_cn6xxx_update_read_index() 457 if (iq->reset_instr_cnt < new_idx) in lio_cn6xxx_update_read_index() 458 new_idx -= iq->reset_instr_cnt; in lio_cn6xxx_update_read_index() [all …]
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| A D | octeon_config.h | 121 #define CFG_GET_IQ_CFG(cfg) ((cfg)->iq) 122 #define CFG_GET_IQ_MAX_Q(cfg) ((cfg)->iq.max_iqs) 123 #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) ((cfg)->iq.pending_list_size) 124 #define CFG_GET_IQ_INSTR_TYPE(cfg) ((cfg)->iq.instr_type) 125 #define CFG_GET_IQ_DB_MIN(cfg) ((cfg)->iq.db_min) 126 #define CFG_GET_IQ_DB_TIMEOUT(cfg) ((cfg)->iq.db_timeout) 128 #define CFG_GET_IQ_INTR_PKT(cfg) ((cfg)->iq.iq_intr_pkt) 129 #define CFG_SET_IQ_INTR_PKT(cfg, val) (cfg)->iq.iq_intr_pkt = val 410 struct octeon_iq_config iq; member
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| /linux/drivers/crypto/marvell/octeontx2/ |
| A D | otx2_cptlf.h | 136 if (iq->real_vaddr) in otx2_cpt_free_instruction_queues() 138 iq->size, in otx2_cpt_free_instruction_queues() 139 iq->real_vaddr, in otx2_cpt_free_instruction_queues() 141 iq->real_vaddr = NULL; in otx2_cpt_free_instruction_queues() 142 iq->vaddr = NULL; in otx2_cpt_free_instruction_queues() 161 iq->real_vaddr = dma_alloc_coherent(&lfs->pdev->dev, iq->size, in otx2_cpt_alloc_instruction_queues() 163 if (!iq->real_vaddr) { in otx2_cpt_alloc_instruction_queues() 167 iq->vaddr = iq->real_vaddr + OTX2_CPT_INST_GRP_QLEN_BYTES; in otx2_cpt_alloc_instruction_queues() 168 iq->dma_addr = iq->real_dma_addr + OTX2_CPT_INST_GRP_QLEN_BYTES; in otx2_cpt_alloc_instruction_queues() 171 iq->vaddr = PTR_ALIGN(iq->vaddr, OTX2_CPT_INST_Q_ALIGNMENT); in otx2_cpt_alloc_instruction_queues() [all …]
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