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Searched refs:kiq (Results 1 – 25 of 29) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_gfx.c312 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init_ring() local
353 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_fini() local
363 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init() local
389 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mqd_sw_init() local
480 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mqd_sw_fini() local
510 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_disable_kcq() local
525 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in amdgpu_gfx_disable_kcq()
562 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_disable_kgq() local
579 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in amdgpu_gfx_disable_kgq()
666 if (!kiq->pmf || !kiq->pmf->kiq_map_queues || !kiq->pmf->kiq_set_resources) in amdgpu_gfx_enable_kcq()
[all …]
A Damdgpu_gmc.c684 struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst]; in amdgpu_gmc_flush_gpu_tlb_pasid() local
713 ndw = kiq->pmf->invalidate_tlbs_size + 8; in amdgpu_gmc_flush_gpu_tlb_pasid()
716 ndw += kiq->pmf->invalidate_tlbs_size; in amdgpu_gmc_flush_gpu_tlb_pasid()
719 ndw += kiq->pmf->invalidate_tlbs_size; in amdgpu_gmc_flush_gpu_tlb_pasid()
721 spin_lock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
724 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
737 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
742 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
759 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_inst]; in amdgpu_gmc_fw_reg_write_reg_wait() local
760 struct amdgpu_ring *ring = &kiq->ring; in amdgpu_gmc_fw_reg_write_reg_wait()
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A Damdgpu_amdkfd.c828 struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst]; in amdgpu_amdkfd_unmap_hiq() local
829 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_amdkfd_unmap_hiq()
834 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in amdgpu_amdkfd_unmap_hiq()
851 spin_lock(&kiq->ring_lock); in amdgpu_amdkfd_unmap_hiq()
853 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) { in amdgpu_amdkfd_unmap_hiq()
854 spin_unlock(&kiq->ring_lock); in amdgpu_amdkfd_unmap_hiq()
859 kiq->pmf->kiq_unmap_queues(kiq_ring, ring, RESET_QUEUES, 0, 0); in amdgpu_amdkfd_unmap_hiq()
864 spin_unlock(&kiq->ring_lock); in amdgpu_amdkfd_unmap_hiq()
A Dmes_v12_0.c1172 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in mes_v12_0_kiq_enable_queue() local
1176 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in mes_v12_0_kiq_enable_queue()
1202 ring = &adev->gfx.kiq[0].ring; in mes_v12_0_queue_init()
1274 spin_lock_init(&adev->gfx.kiq[0].ring_lock); in mes_v12_0_kiq_ring_init()
1276 ring = &adev->gfx.kiq[0].ring; in mes_v12_0_kiq_ring_init()
1302 ring = &adev->gfx.kiq[0].ring; in mes_v12_0_mqd_sw_init()
1388 &adev->gfx.kiq[0].ring.mqd_gpu_addr, in mes_v12_0_sw_fini()
1389 &adev->gfx.kiq[0].ring.mqd_ptr); in mes_v12_0_sw_fini()
1390 amdgpu_ring_fini(&adev->gfx.kiq[0].ring); in mes_v12_0_sw_fini()
1459 mes_v12_0_kiq_setting(&adev->gfx.kiq[0].ring); in mes_v12_0_kiq_hw_init()
[all …]
A Dmes_v11_0.c1199 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in mes_v11_0_kiq_enable_queue() local
1203 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in mes_v11_0_kiq_enable_queue()
1224 ring = &adev->gfx.kiq[0].ring; in mes_v11_0_queue_init()
1279 spin_lock_init(&adev->gfx.kiq[0].ring_lock); in mes_v11_0_kiq_ring_init()
1281 ring = &adev->gfx.kiq[0].ring; in mes_v11_0_kiq_ring_init()
1307 ring = &adev->gfx.kiq[0].ring; in mes_v11_0_mqd_sw_init()
1395 &adev->gfx.kiq[0].ring.mqd_gpu_addr, in mes_v11_0_sw_fini()
1396 &adev->gfx.kiq[0].ring.mqd_ptr); in mes_v11_0_sw_fini()
1402 amdgpu_ring_fini(&adev->gfx.kiq[0].ring); in mes_v11_0_sw_fini()
1497 mes_v11_0_kiq_setting(&adev->gfx.kiq[0].ring); in mes_v11_0_kiq_hw_init()
[all …]
A Dgfx_v9_0.c3773 if (adev->gfx.kiq[0].mqd_backup) in gfx_v9_0_kiq_init_queue()
3798 if (adev->gfx.kiq[0].mqd_backup) in gfx_v9_0_kiq_init_queue()
3848 ring = &adev->gfx.kiq[0].ring; in gfx_v9_0_kiq_resume()
4034 adev->gfx.kiq[0].ring.pipe, in gfx_v9_0_hw_fini()
4157 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v9_0_kiq_read_clock() local
5699 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v9_0_ring_preempt_ib() local
5703 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v9_0_ring_preempt_ib()
7189 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v9_0_reset_kgq() local
7198 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v9_0_reset_kgq()
7235 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v9_0_reset_kcq() local
[all …]
A Dgfx_v9_4_3.c2003 ((adev->doorbell_index.kiq + in gfx_v9_4_3_xcc_kiq_init_register()
2095 if (adev->gfx.kiq[xcc_id].mqd_backup) in gfx_v9_4_3_xcc_kiq_init_queue()
2119 if (adev->gfx.kiq[xcc_id].mqd_backup) in gfx_v9_4_3_xcc_kiq_init_queue()
2190 ring = &adev->gfx.kiq[xcc_id].ring; in gfx_v9_4_3_xcc_kiq_resume()
2333 adev->gfx.kiq[xcc_id].ring.pipe, in gfx_v9_4_3_xcc_fini()
2334 adev->gfx.kiq[xcc_id].ring.queue, 0, in gfx_v9_4_3_xcc_fini()
3572 struct amdgpu_kiq *kiq = &adev->gfx.kiq[ring->xcc_id]; in gfx_v9_4_3_reset_kcq() local
3573 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v9_4_3_reset_kcq()
3583 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v9_4_3_reset_kcq()
3586 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v9_4_3_reset_kcq()
[all …]
A Dgfx_v10_0.c4733 &adev->gfx.kiq[0].irq); in gfx_v10_0_sw_init()
6964 (adev->doorbell_index.kiq * 2) << 2); in gfx_v10_0_kiq_init_register()
7003 if (adev->gfx.kiq[0].mqd_backup) in gfx_v10_0_kiq_init_queue()
7026 if (adev->gfx.kiq[0].mqd_backup) in gfx_v10_0_kiq_init_queue()
7067 ring = &adev->gfx.kiq[0].ring; in gfx_v10_0_kiq_resume()
8760 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v10_0_ring_preempt_ib() local
8764 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v10_0_ring_preempt_ib()
9424 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v10_0_reset_kgq() local
9434 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v10_0_reset_kgq()
9492 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v10_0_reset_kcq() local
[all …]
A Damdgpu_amdkfd_gfx_v10_3.c280 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in hiq_mqd_load_v10_3()
295 spin_lock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v10_3()
322 spin_unlock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v10_3()
A Dvega10_reg_init.c60 adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; in vega10_doorbell_index_init()
A Damdgpu_amdkfd_gfx_v11.c265 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in hiq_mqd_load_v11()
280 spin_lock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v11()
307 spin_unlock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v11()
A Dvega20_reg_init.c60 adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ; in vega20_doorbell_index_init()
A Damdgpu_doorbell.h52 uint32_t kiq; member
A Dgfx_v12_0.c378 adev->gfx.kiq[0].pmf = &gfx_v12_0_kiq_pm4_funcs; in gfx_v12_0_set_kiq_pm4_funcs()
2671 adev->gfx.kiq[0].ring.sched.ready = enable; in gfx_v12_0_cp_compute_enable()
2832 (adev->doorbell_index.kiq * 2) << 2); in gfx_v12_0_cp_set_doorbell_range()
3199 (adev->doorbell_index.kiq * 2) << 2); in gfx_v12_0_kiq_init_register()
3303 ring = &adev->gfx.kiq[0].ring; in gfx_v12_0_kiq_resume()
4508 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v12_0_ring_preempt_ib() local
4509 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v12_0_ring_preempt_ib()
4515 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v12_0_ring_preempt_ib()
4518 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v12_0_ring_preempt_ib()
4521 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v12_0_ring_preempt_ib()
[all …]
A Damdgpu_amdkfd_gfx_v10.c294 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in kgd_hiq_mqd_load()
309 spin_lock(&adev->gfx.kiq[0].ring_lock); in kgd_hiq_mqd_load()
336 spin_unlock(&adev->gfx.kiq[0].ring_lock); in kgd_hiq_mqd_load()
A Dgfx_v11_0.c427 adev->gfx.kiq[0].pmf = &gfx_v11_0_kiq_pm4_funcs; in gfx_v11_0_set_kiq_pm4_funcs()
3881 (adev->doorbell_index.kiq * 2) << 2); in gfx_v11_0_cp_set_doorbell_range()
4255 (adev->doorbell_index.kiq * 2) << 2); in gfx_v11_0_kiq_init_register()
4294 if (adev->gfx.kiq[0].mqd_backup) in gfx_v11_0_kiq_init_queue()
4317 if (adev->gfx.kiq[0].mqd_backup) in gfx_v11_0_kiq_init_queue()
4358 ring = &adev->gfx.kiq[0].ring; in gfx_v11_0_kiq_resume()
5922 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v11_0_ring_preempt_ib() local
5923 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v11_0_ring_preempt_ib()
5929 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v11_0_ring_preempt_ib()
5932 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v11_0_ring_preempt_ib()
[all …]
A Dgfx_v8_0.c2051 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq[0].ring); in gfx_v8_0_sw_fini()
4292 adev->gfx.kiq[0].ring.sched.ready = false; in gfx_v8_0_cp_compute_enable()
4600 if (adev->gfx.kiq[0].mqd_backup) in gfx_v8_0_kiq_init_queue()
4624 if (adev->gfx.kiq[0].mqd_backup) in gfx_v8_0_kiq_init_queue()
4675 ring = &adev->gfx.kiq[0].ring; in gfx_v8_0_kiq_resume()
4739 ring = &adev->gfx.kiq[0].ring; in gfx_v8_0_cp_test_all_rings()
6892 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v8_0_reset_kgq() local
6893 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v8_0_reset_kgq()
6901 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v8_0_reset_kgq()
6904 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v8_0_reset_kgq()
[all …]
A Damdgpu_amdkfd_gfx_v9.c305 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[inst].ring; in kgd_gfx_v9_hiq_mqd_load()
320 spin_lock(&adev->gfx.kiq[inst].ring_lock); in kgd_gfx_v9_hiq_mqd_load()
347 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in kgd_gfx_v9_hiq_mqd_load()
A Dgfx_v7_0.c4958 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v7_0_reset_kgq() local
4959 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v7_0_reset_kgq()
4967 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v7_0_reset_kgq()
4970 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v7_0_reset_kgq()
4973 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v7_0_reset_kgq()
4981 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v7_0_reset_kgq()
A Dsoc24.c298 adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; in soc24_init_doorbell_index()
A Damdgpu_gfx.h368 struct amdgpu_kiq kiq[AMDGPU_MAX_GC_INSTANCES]; member
A Dgmc_v11_0.c234 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) && in gmc_v11_0_flush_gpu_tlb()
A Dgmc_v12_0.c302 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) && in gmc_v12_0_flush_gpu_tlb()
A Dgmc_v10_0.c273 if (adev->gfx.kiq[0].ring.sched.ready && !adev->enable_mes && in gmc_v10_0_flush_gpu_tlb()
A Dsoc21.c487 adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; in soc21_init_doorbell_index()

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