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Searched refs:latch (Results 1 – 25 of 52) sorted by relevance

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/linux/Documentation/devicetree/bindings/gpio/
A Dgpio-latch.yaml4 $id: http://devicetree.org/schemas/gpio/gpio-latch.yaml#
7 title: GPIO latch controller
43 of number of latches and the number of inputs per latch is derived from
48 const: gpio-latch
53 description: Array of GPIOs to be used to clock a latch
56 description: Array of GPIOs to be used as inputs per latch
59 description: Delay in nanoseconds to wait after the latch inputs have been
80 gpio-latch {
84 compatible = "gpio-latch";
A Dsprd,gpio-eic.yaml19 controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and
32 The EIC-latch sub-module is used to latch some special power down signals
33 and generate interrupts, since the EIC-latch does not depend on the APB
48 - sprd,sc9860-eic-latch
58 - sprd,ums512-eic-latch
59 - const: sprd,sc9860-eic-latch
/linux/Documentation/driver-api/surface_aggregator/clients/
A Ddtx.rst93 - If the latch is unlocked, the EC will open the latch and the clipboard
98 - If the latch is locked, the EC will *not* open the latch, meaning the
113 As this changes the latch state, a *latch-status* event
119 If the latch is currently locked, the latch will automatically be
219 - Failed to open latch.
411 Sent when the latch status has changed, i.e. when the latch has been opened,
495 - Lock the latch.
501 - Unlock the latch.
567 the latch on timeout. The latch is unlocked by default. This command will be
575 Unlocks the latch, causing the detachment procedure to open the latch on
[all …]
/linux/drivers/clk/ti/
A Dmux.c81 ti_clk_latch(&mux->reg, mux->latch); in ti_clk_mux_set_parent()
125 s8 latch, u8 clk_mux_flags, u32 *table) in _register_mux() argument
146 mux->latch = latch; in _register_mux()
175 s32 latch = -EINVAL; in of_mux_clk_setup() local
194 of_property_read_u32(node, "ti,latch-bit", &latch); in of_mux_clk_setup()
211 flags, &reg, shift, mask, latch, clk_mux_flags, in of_mux_clk_setup()
235 mux->latch = -EINVAL; in ti_clk_build_component_mux()
A Dclk.c387 u32 latch; in ti_clk_latch() local
392 latch = 1 << shift; in ti_clk_latch()
394 ti_clk_ll_ops->clk_rmw(latch, latch, reg); in ti_clk_latch()
395 ti_clk_ll_ops->clk_rmw(0, latch, reg); in ti_clk_latch()
A Dclock.h16 s8 latch; member
32 s8 latch; member
A Ddivider.c261 ti_clk_latch(&divider->reg, divider->latch); in ti_clk_divider_set_rate()
483 div->latch = val; in ti_clk_divider_populate()
485 div->latch = -EINVAL; in ti_clk_divider_populate()
/linux/drivers/gpio/
A Dgpio-latch.c78 int latch = offset / priv->n_latched_gpios; in gpio_latch_set_unlocked() local
85 test_bit(latch * priv->n_latched_gpios + i, priv->shadow)); in gpio_latch_set_unlocked()
88 set(priv->clk_gpios->desc[latch], 1); in gpio_latch_set_unlocked()
90 set(priv->clk_gpios->desc[latch], 0); in gpio_latch_set_unlocked()
/linux/drivers/pcmcia/
A Dtcic.c532 u_char latch, sstat; in tcic_interrupt() local
550 latch = sstat ^ socket_table[psock].last_sstat; in tcic_interrupt()
556 if (latch == 0) in tcic_interrupt()
558 events = (latch & TCIC_SSTAT_CD) ? SS_DETECT : 0; in tcic_interrupt()
559 events |= (latch & TCIC_SSTAT_WP) ? SS_WRPROT : 0; in tcic_interrupt()
561 events |= (latch & TCIC_SSTAT_LBAT1) ? SS_STSCHG : 0; in tcic_interrupt()
563 events |= (latch & TCIC_SSTAT_RDY) ? SS_READY : 0; in tcic_interrupt()
564 events |= (latch & TCIC_SSTAT_LBAT1) ? SS_BATDEAD : 0; in tcic_interrupt()
565 events |= (latch & TCIC_SSTAT_LBAT2) ? SS_BATWARN : 0; in tcic_interrupt()
/linux/Documentation/devicetree/bindings/clock/
A Darmada3700-xtal-clock.txt4 reading the gpio latch register.
7 of the GPIO block where the gpio latch is located.
/linux/drivers/clocksource/
A Dtimer-ixp4xx.c48 u32 latch; member
138 val = tmr->latch & ~IXP4XX_OST_RELOAD_MASK; in ixp4xx_set_periodic()
180 tmr->latch = DIV_ROUND_CLOSEST(timer_freq, in ixp4xx_timer_register()
/linux/kernel/time/
A Dclockevents.c32 static u64 cev_delta2ns(unsigned long latch, struct clock_event_device *evt, in cev_delta2ns() argument
35 u64 clc = (u64) latch << evt->shift; in cev_delta2ns()
46 if ((clc >> evt->shift) != (u64)latch) in cev_delta2ns()
85 u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt) in clockevent_delta2ns() argument
87 return cev_delta2ns(latch, evt, false); in clockevent_delta2ns()
/linux/arch/x86/kernel/
A Dtsc.c426 static unsigned long pit_calibrate_tsc(u32 latch, unsigned long ms, int loopmin) in pit_calibrate_tsc() argument
455 outb(latch & 0xff, 0x42); in pit_calibrate_tsc()
456 outb(latch >> 8, 0x42); in pit_calibrate_tsc()
758 unsigned long flags, latch, ms; in pit_hpet_ptimer_calibrate_cpu() local
787 latch = CAL_LATCH; in pit_hpet_ptimer_calibrate_cpu()
802 tsc_pit_khz = pit_calibrate_tsc(latch, ms, loopmin); in pit_hpet_ptimer_calibrate_cpu()
848 latch = CAL2_LATCH; in pit_hpet_ptimer_calibrate_cpu()
/linux/Documentation/devicetree/bindings/mtd/
A Dfsl-upm-nand.txt6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
/linux/arch/arm/boot/dts/ti/omap/
A Ddra76x.dtsi101 ti,latch-bit = <26>;
120 ti,latch-bit = <26>;
/linux/Documentation/devicetree/bindings/clock/ti/
A Dmux.txt50 - ti,latch-bit : latch the mux value to HW, only needed if the register
A Ddivider.txt76 - ti,latch-bit : latch the divider value to HW, only needed if the register
/linux/Documentation/devicetree/bindings/spi/
A Dmediatek,spi-mtk-snfi.yaml48 mediatek,rx-latch-latency-ns:
49 description: Data read latch latency, unit is nanoseconds.
/linux/Documentation/devicetree/bindings/iio/adc/
A Dmaxim,max34408.yaml53 SHTDN Enable Input. CMOS digital input. Connect to GND to clear the latch and
55 delay. Connect to VDD to enable normal latch operation of the SHTDN output.
/linux/drivers/platform/surface/
A Dsurface_dtx.c319 u8 latch; in sdtx_ioctl_get_latch_status() local
324 status = ssam_retry(ssam_bas_get_latch_status, ddev->ctrl, &latch); in sdtx_ioctl_get_latch_status()
328 return put_user(sdtx_translate_latch_status(ddev, latch), buf); in sdtx_ioctl_get_latch_status()
878 u8 mode, latch; in sdtx_device_state_workfn() local
906 status = ssam_retry(ssam_bas_get_latch_status, ddev->ctrl, &latch); in sdtx_device_state_workfn()
929 __sdtx_device_state_update_latch(ddev, latch); in sdtx_device_state_workfn()
/linux/Documentation/hwmon/
A Dadm9240.rst178 a 20 ms active low pulse to reset an external Chassis Intrusion latch.
180 Clear the CI latch by writing value 0 to the sysfs intrusion0_alarm file.
200 that alarm bits may be cleared on read, user-space may latch alarms and
/linux/include/linux/
A Dclockchips.h182 extern u64 clockevent_delta2ns(unsigned long latch, struct clock_event_device *evt);
/linux/Documentation/devicetree/bindings/mmc/
A Dmtk-sd.yaml129 Gear of the third delay line for DS for input data latch in data
138 mediatek,latch-ck:
141 Some SoCs do not support enhance_rx, need set correct latch-ck to avoid
/linux/Documentation/virt/kvm/devices/
A Darm-vgic-v3.rst156 here is that of the latch which is set by ISPENDR and cleared by ICPENDR or
158 ISPENDR is the logical OR of the latch value and the input line level.
160 Raw access to the latch state is provided to userspace so that it can save
162 combination of the current input line level and the latch state, and cannot
/linux/drivers/iio/imu/bmi323/
A Dbmi323_core.c1837 bool active_high, bool open_drain, bool latch) in bmi323_int_pin_config() argument
1844 FIELD_PREP(BMI323_IO_INT_LTCH_MSK, latch)); in bmi323_int_pin_config()
1880 bool open_drain, active_high, latch; in bmi323_trigger_probe() local
1909 latch = false; in bmi323_trigger_probe()
1913 latch = true; in bmi323_trigger_probe()
1917 latch = false; in bmi323_trigger_probe()
1921 latch = true; in bmi323_trigger_probe()
1933 latch); in bmi323_trigger_probe()

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