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/linux/drivers/net/ethernet/mellanox/mlx4/
A Dfw_qos.c94 if (IS_ERR(mailbox)) in mlx4_SET_PORT_PRIO2TC()
95 return PTR_ERR(mailbox); in mlx4_SET_PORT_PRIO2TC()
97 context = mailbox->buf; in mlx4_SET_PORT_PRIO2TC()
121 if (IS_ERR(mailbox)) in mlx4_SET_PORT_SCHEDULER()
124 context = mailbox->buf; in mlx4_SET_PORT_SCHEDULER()
168 if (IS_ERR(mailbox)) in mlx4_ALLOCATE_VPP_get()
202 if (IS_ERR(mailbox)) in mlx4_ALLOCATE_VPP_set()
230 if (IS_ERR(mailbox)) in mlx4_SET_VPORT_QOS_get()
233 ctx = mailbox->buf; in mlx4_SET_VPORT_QOS_get()
267 if (IS_ERR(mailbox)) in mlx4_SET_VPORT_QOS_set()
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A Dsrq.c75 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num, in mlx4_HW2SW_SRQ()
166 struct mlx4_cmd_mailbox *mailbox; in mlx4_srq_alloc() local
182 if (IS_ERR(mailbox)) { in mlx4_srq_alloc()
183 err = PTR_ERR(mailbox); in mlx4_srq_alloc()
187 srq_context = mailbox->buf; in mlx4_srq_alloc()
202 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_srq_alloc()
251 struct mlx4_cmd_mailbox *mailbox; in mlx4_srq_query() local
256 if (IS_ERR(mailbox)) in mlx4_srq_query()
257 return PTR_ERR(mailbox); in mlx4_srq_query()
259 srq_context = mailbox->buf; in mlx4_srq_query()
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A Dmcg.c195 if (IS_ERR(mailbox)) { in new_steering_entry()
199 mgm = mailbox->buf; in new_steering_entry()
344 if (IS_ERR(mailbox)) in promisc_steering_entry()
346 mgm = mailbox->buf; in promisc_steering_entry()
458 mgm = mailbox->buf; in add_promisc_qp()
588 mgm = mailbox->buf; in remove_promisc_qp()
621 mailbox); in remove_promisc_qp()
708 if (IS_ERR(mailbox)) in find_entry()
710 mgid = mailbox->buf; in find_entry()
1122 mgm = mailbox->buf; in mlx4_qp_attach_common()
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A Dcq.c164 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, in mlx4_HW2SW_CQ()
172 struct mlx4_cmd_mailbox *mailbox; in mlx4_cq_modify() local
177 if (IS_ERR(mailbox)) in mlx4_cq_modify()
178 return PTR_ERR(mailbox); in mlx4_cq_modify()
180 cq_context = mailbox->buf; in mlx4_cq_modify()
200 if (IS_ERR(mailbox)) in mlx4_cq_resize()
201 return PTR_ERR(mailbox); in mlx4_cq_resize()
203 cq_context = mailbox->buf; in mlx4_cq_resize()
371 if (IS_ERR(mailbox)) { in mlx4_cq_alloc()
372 err = PTR_ERR(mailbox); in mlx4_cq_alloc()
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A Dfw.c190 if (IS_ERR(mailbox)) in mlx4_MOD_STAT_CFG()
192 inbox = mailbox->buf; in mlx4_MOD_STAT_CFG()
222 if (IS_ERR(mailbox)) in mlx4_QUERY_FUNC()
224 outbox = mailbox->buf; in mlx4_QUERY_FUNC()
556 if (IS_ERR(mailbox)) in mlx4_QUERY_FUNC_CAP()
834 if (IS_ERR(mailbox)) in mlx4_QUERY_DEV_CAP()
1195 if (IS_ERR(mailbox)) in mlx4_QUERY_PORT()
1496 if (IS_ERR(mailbox)) in mlx4_get_slave_pkey_gid_tbl_len()
1531 if (IS_ERR(mailbox)) in mlx4_map_cmd()
1649 if (IS_ERR(mailbox)) in mlx4_QUERY_FW()
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A Dmr.c287 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, in mlx4_HW2SW_MPT()
318 if (IS_ERR(mailbox)) in mlx4_mr_hw_get_mpt()
319 return PTR_ERR(mailbox); in mlx4_mr_hw_get_mpt()
638 if (IS_ERR(mailbox)) { in mlx4_mr_enable()
639 err = PTR_ERR(mailbox); in mlx4_mr_enable()
642 mpt_entry = mailbox->buf; in mlx4_mr_enable()
760 if (IS_ERR(mailbox)) in mlx4_write_mtt()
762 inbox = mailbox->buf; in mlx4_write_mtt()
849 if (IS_ERR(mailbox)) { in mlx4_mw_enable()
850 err = PTR_ERR(mailbox); in mlx4_mw_enable()
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/linux/drivers/mailbox/
A DMakefile4 obj-$(CONFIG_MAILBOX) += mailbox.o
6 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
14 obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
22 obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o
28 obj-$(CONFIG_ALTERA_MBOX) += mailbox-altera.o
30 obj-$(CONFIG_BCM2835_MBOX) += bcm2835-mailbox.o
32 obj-$(CONFIG_STI_MBOX) += mailbox-sti.o
38 obj-$(CONFIG_HI3660_MBOX) += hi3660-mailbox.o
40 obj-$(CONFIG_HI6220_MBOX) += hi6220-mailbox.o
42 obj-$(CONFIG_BCM_PDC_MBOX) += bcm-pdc-mailbox.o
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/linux/drivers/infiniband/hw/mthca/
A Dmthca_mcg.c67 struct mthca_mailbox *mailbox; in find_mgm() local
73 if (IS_ERR(mailbox)) in find_mgm()
75 mgid = mailbox->buf; in find_mgm()
123 struct mthca_mailbox *mailbox; in mthca_multicast_attach() local
132 if (IS_ERR(mailbox)) in mthca_multicast_attach()
133 return PTR_ERR(mailbox); in mthca_multicast_attach()
134 mgm = mailbox->buf; in mthca_multicast_attach()
225 if (IS_ERR(mailbox)) in mthca_multicast_detach()
226 return PTR_ERR(mailbox); in mthca_multicast_detach()
227 mgm = mailbox->buf; in mthca_multicast_detach()
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A Dmthca_cmd.c614 mailbox = kmalloc(sizeof *mailbox, gfp_mask); in mthca_alloc_mailbox()
615 if (!mailbox) in mthca_alloc_mailbox()
618 mailbox->buf = dma_pool_alloc(dev->cmd.pool, gfp_mask, &mailbox->dma); in mthca_alloc_mailbox()
620 kfree(mailbox); in mthca_alloc_mailbox()
624 return mailbox; in mthca_alloc_mailbox()
629 if (!mailbox) in mthca_free_mailbox()
632 dma_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma); in mthca_free_mailbox()
633 kfree(mailbox); in mthca_free_mailbox()
1612 return mthca_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, in mthca_HW2SW_MPT()
1779 if (!mailbox) { in mthca_MODIFY_QP()
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A Dmthca_cmd.h283 int mthca_SW2HW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
285 int mthca_HW2SW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
292 int mthca_SW2HW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
294 int mthca_HW2SW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
296 int mthca_SW2HW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
298 int mthca_HW2SW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
306 struct mthca_mailbox *mailbox);
310 struct mthca_mailbox *mailbox, u32 optmask);
312 struct mthca_mailbox *mailbox);
318 struct mthca_mailbox *mailbox);
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/linux/arch/arm64/kernel/
A Dacpi_parking_protocol.c21 struct parking_protocol_mailbox __iomem *mailbox; member
62 struct parking_protocol_mailbox __iomem *mailbox; in acpi_parking_protocol_cpu_boot() local
76 mailbox = ioremap(cpu_entry->mailbox_addr, sizeof(*mailbox)); in acpi_parking_protocol_cpu_boot()
77 if (!mailbox) in acpi_parking_protocol_cpu_boot()
80 cpu_id = readl_relaxed(&mailbox->cpu_id); in acpi_parking_protocol_cpu_boot()
86 iounmap(mailbox); in acpi_parking_protocol_cpu_boot()
94 cpu_entry->mailbox = mailbox; in acpi_parking_protocol_cpu_boot()
103 &mailbox->entry_point); in acpi_parking_protocol_cpu_boot()
104 writel_relaxed(cpu_entry->gic_cpu_id, &mailbox->cpu_id); in acpi_parking_protocol_cpu_boot()
115 struct parking_protocol_mailbox __iomem *mailbox = cpu_entry->mailbox; in acpi_parking_protocol_cpu_postboot() local
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/linux/Documentation/devicetree/bindings/mailbox/
A Dxlnx,zynqmp-ipi-mailbox.yaml4 $id: http://devicetree.org/schemas/mailbox/xlnx,zynqmp-ipi-mailbox.yaml#
41 - xlnx,zynqmp-ipi-mailbox
42 - xlnx,versal-ipi-mailbox
80 '^mailbox@[0-9a-f]+$':
88 - xlnx,zynqmp-ipi-dest-mailbox
89 - xlnx,versal-ipi-dest-mailbox
192 zynqmp-mailbox {
200 mailbox: mailbox@ff9905c0 {
222 mailbox@ff300000 {
234 mailbox@ff340000 {
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A Dmicrochip,mpfs-mailbox.yaml4 $id: http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#
7 title: Microchip PolarFire SoC (MPFS) MSS (microprocessor subsystem) mailbox controller
14 const: microchip,mpfs-mailbox
19 - description: mailbox control & data registers
20 - description: mailbox interrupt registers
23 - description: mailbox control registers
24 - description: mailbox interrupt registers
25 - description: mailbox data registers
46 mbox: mailbox@37020000 {
47 compatible = "microchip,mpfs-mailbox";
A Dapple,mailbox.yaml4 $id: http://devicetree.org/schemas/mailbox/apple,mailbox.yaml#
31 - apple,t8103-asc-mailbox
32 - apple,t8112-asc-mailbox
33 - apple,t6000-asc-mailbox
34 - const: apple,asc-mailbox-v4
42 - apple,t8103-m3-mailbox
43 - apple,t8112-m3-mailbox
44 - apple,t6000-m3-mailbox
45 - const: apple,m3-mailbox-v2
81 mailbox@77408000 {
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A Dti,omap-mailbox.yaml4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
86 omap-sub-mailbox:
167 $ref: "#/$defs/omap-sub-mailbox"
182 - ti,am654-mailbox
183 - ti,am64-mailbox
198 - ti,omap4-mailbox
213 - ti,omap3-mailbox
228 - ti,omap2-mailbox
245 mailbox: mailbox@4a0f4000 {
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A Dmailbox.txt4 assign appropriate mailbox channel to client drivers.
9 - #mbox-cells: Must be at least 1. Number of cells in a mailbox
13 mailbox: mailbox {
22 - mboxes: List of phandle and mailbox channel specifiers.
25 - mbox-names: List of identifier strings for each mailbox channel.
27 users of these mailboxes for IPC, one for each mailbox. This shared
29 communication between the mailbox client and the remote.
36 mboxes = <&mailbox 0 &mailbox 1>;
57 mboxes = <&mailbox 0>;
A Daltera-mailbox.txt5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
9 of cells required for the mailbox specifier. Should be 1.
16 mbox_tx: mailbox@100 {
17 compatible = "altr,mailbox-1.0";
24 mbox_rx: mailbox@200 {
25 compatible = "altr,mailbox-1.0";
35 Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
36 of the mboxes property should contain a phandle to the mailbox controller
A Dhisilicon,hi6220-mailbox.txt4 Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
20 of cells required for the mailbox specifier. Must be 3.
22 phandle: Label name of mailbox controller
27 mailbox driver uses it to acknowledge interrupt
28 - interrupts: Contains the interrupt information for the mailbox
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
42 mailbox: mailbox@f7510000 {
58 - mboxes: Standard property to specify a Mailbox (See ./mailbox.txt)
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A Dxgene-slimpro-mailbox.txt1 The APM X-Gene SLIMpro mailbox is used to communicate messages between
6 There are total of 8 interrupts in this mailbox. Each used for an individual
7 door bell (or mailbox channel).
12 - reg: Contains the mailbox register address range.
15 the interrupt for mailbox channel 0 and interrupt 1 for
16 mailbox channel 1 and so likewise for the reminder.
18 - #mbox-cells: only one to specify the mailbox channel number.
23 mailbox: mailbox@10540000 {
A Dsprd-mailbox.yaml4 $id: http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml#
7 title: Spreadtrum mailbox controller
17 - sprd,sc9860-mailbox
18 - sprd,sc9863a-mailbox
60 mailbox: mailbox@400a0000 {
61 compatible = "sprd,sc9860-mailbox";
A Drockchip-mailbox.txt1 Rockchip mailbox
3 The Rockchip mailbox is used by the Rockchip CPU cores to communicate
6 Refer to ./mailbox.txt for generic information about mailbox device-tree
17 - #mbox-cells: Common mailbox binding property to identify the number
18 of cells required for the mailbox specifier. Should be 1
25 compatible = "rockchip,rk3368-mailbox";
A Dst,sti-mailbox.yaml4 $id: http://devicetree.org/schemas/mailbox/st,sti-mailbox.yaml#
19 const: st,stih407-mailbox
26 description: name of the mailbox IP
29 description: the irq line for the RX mailbox
45 mailbox0: mailbox@8f00000 {
46 compatible = "st,stih407-mailbox";
A Dnvidia,tegra186-hsp.yaml4 $id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
26 second cell is used to identify the mailbox that the client is going
32 mailbox to be used (based on the data size). If no flag is
33 specified then, 32-bit shared mailbox is used.
35 Defines the type of the mailbox to be used. This field should be
43 A bit mask of flags that further specify how the shared mailbox
46 Defines the direction of the mailbox. If set, the mailbox
48 cleared, the mailbox is the consumer of data sent by a
57 construct mailbox specifiers:
59 <dt-bindings/mailbox/tegra186-hsp.h>
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A Dmediatek,gce-props.yaml4 $id: http://devicetree.org/schemas/mailbox/mediatek,gce-props.yaml#
15 (CMDQ) mailbox driver is a driver for GCE, implemented using the Linux
16 mailbox framework. It is used to receive messages from mailbox consumers
18 We use mediatek,gce-mailbox.yaml to define the properties for CMDQ mailbox
20 registers is a mailbox consumer. The mailbox consumer can request a mailbox
22 that the GCE thread to configure its hardware. The mailbox provider can also
23 reserve a mailbox channel to configure GCE hardware register by the specific
24 GCE thread. This binding defines the common GCE properties for both mailbox
/linux/drivers/infiniband/hw/hns/
A Dhns_roce_cmd.c255 struct hns_roce_cmd_mailbox *mailbox; in hns_roce_alloc_cmd_mailbox() local
257 mailbox = kmalloc(sizeof(*mailbox), GFP_KERNEL); in hns_roce_alloc_cmd_mailbox()
258 if (!mailbox) in hns_roce_alloc_cmd_mailbox()
261 mailbox->buf = in hns_roce_alloc_cmd_mailbox()
263 if (!mailbox->buf) { in hns_roce_alloc_cmd_mailbox()
264 kfree(mailbox); in hns_roce_alloc_cmd_mailbox()
268 return mailbox; in hns_roce_alloc_cmd_mailbox()
274 if (!mailbox) in hns_roce_free_cmd_mailbox()
277 dma_pool_free(hr_dev->cmd.pool, mailbox->buf, mailbox->dma); in hns_roce_free_cmd_mailbox()
278 kfree(mailbox); in hns_roce_free_cmd_mailbox()
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