| /linux/drivers/gpu/drm/radeon/ |
| A D | cypress_dpm.c | 959 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s0); in cypress_populate_mc_reg_addresses() 961 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s1); in cypress_populate_mc_reg_addresses() 1007 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_EMRS >> 2; in cypress_set_mc_reg_address_table() 1011 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_PMG_CMD_MRS >> 2; in cypress_set_mc_reg_address_table() 1018 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC1 >> 2; in cypress_set_mc_reg_address_table() 1019 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC1 >> 2; in cypress_set_mc_reg_address_table() 1026 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC3 >> 2; in cypress_set_mc_reg_address_table() 1027 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC3 >> 2; in cypress_set_mc_reg_address_table() 1041 RREG32(eg_pi->mc_reg_table.mc_reg_address[i].s1 << 2); in cypress_retrieve_ac_timing_for_one_entry() 1175 value = RREG32(eg_pi->mc_reg_table.mc_reg_address[i].s1 << 2); in cypress_copy_ac_timing_from_s1_to_s0() [all …]
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| A D | btc_dpm.c | 1894 switch (table->mc_reg_address[i].s1) { in btc_set_mc_special_registers() 1897 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in btc_set_mc_special_registers() 1898 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in btc_set_mc_special_registers() 1910 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in btc_set_mc_special_registers() 1911 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in btc_set_mc_special_registers() 1926 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in btc_set_mc_special_registers() 1927 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2; in btc_set_mc_special_registers() 1954 table->mc_reg_address[i].s0 = in btc_set_s0_mc_reg_index() 1955 btc_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in btc_set_s0_mc_reg_index() 1956 address : table->mc_reg_address[i].s1; in btc_set_s0_mc_reg_index() [all …]
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| A D | cypress_dpm.h | 39 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member
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| A D | si_dpm.h | 112 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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| A D | ni_dpm.c | 2722 switch (table->mc_reg_address[i].s1) { in ni_set_mc_special_registers() 2727 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ni_set_mc_special_registers() 2728 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in ni_set_mc_special_registers() 2738 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in ni_set_mc_special_registers() 2739 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ni_set_mc_special_registers() 2753 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in ni_set_mc_special_registers() 2843 table->mc_reg_address[i].s0 = in ni_set_s0_mc_reg_index() 2845 address : table->mc_reg_address[i].s1; in ni_set_s0_mc_reg_index() 2859 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ni_copy_vbios_mc_reg_table() 2936 cpu_to_be16(ni_pi->mc_reg_table.mc_reg_address[j].s0); in ni_populate_mc_reg_addresses() [all …]
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| A D | ni_dpm.h | 57 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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| A D | ci_dpm.h | 87 SMU7_Discrete_MCRegisterAddress mc_reg_address[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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| A D | ci_dpm.c | 4302 switch (table->mc_reg_address[i].s1 << 2) { in ci_set_mc_special_registers() 4305 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ci_set_mc_special_registers() 4316 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in ci_set_mc_special_registers() 4317 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ci_set_mc_special_registers() 4329 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2; in ci_set_mc_special_registers() 4330 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2; in ci_set_mc_special_registers() 4342 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in ci_set_mc_special_registers() 4457 table->mc_reg_address[i].s0 = in ci_set_s0_mc_reg_index() 4459 address : table->mc_reg_address[i].s1; in ci_set_s0_mc_reg_index() 4474 ci_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ci_copy_vbios_mc_reg_table() [all …]
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| A D | si_dpm.c | 5302 switch (table->mc_reg_address[i].s1 << 2) { in si_set_mc_special_registers() 5305 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in si_set_mc_special_registers() 5316 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in si_set_mc_special_registers() 5330 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers() 5331 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers() 5342 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in si_set_mc_special_registers() 5437 table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in si_set_s0_mc_reg_index() 5438 address : table->mc_reg_address[i].s1; in si_set_s0_mc_reg_index() 5453 si_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in si_copy_vbios_mc_reg_table() 5530 cpu_to_be16(si_pi->mc_reg_table.mc_reg_address[j].s0); in si_populate_mc_reg_addresses() [all …]
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| A D | radeon_mode.h | 629 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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| A D | radeon_atombios.c | 4022 reg_table->mc_reg_address[i].s1 = in radeon_atom_init_mc_reg_table() 4024 reg_table->mc_reg_address[i].pre_reg_data = in radeon_atom_init_mc_reg_table() 4040 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in radeon_atom_init_mc_reg_table() 4044 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in radeon_atom_init_mc_reg_table()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| A D | iceland_smumgr.h | 57 SMU71_Discrete_MCRegisterAddress mc_reg_address[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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| A D | ci_smumgr.h | 58 SMU7_Discrete_MCRegisterAddress mc_reg_address[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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| A D | tonga_smumgr.h | 59 SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
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| A D | iceland_smumgr.c | 2474 table->mc_reg_address[i].s0 = in iceland_set_s0_mc_reg_index() 2476 ? address : table->mc_reg_address[i].s1; in iceland_set_s0_mc_reg_index() 2492 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in iceland_copy_vbios_smc_reg_table() 2521 switch (table->mc_reg_address[i].s1) { in iceland_set_mc_special_registers() 2525 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in iceland_set_mc_special_registers() 2526 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in iceland_set_mc_special_registers() 2537 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in iceland_set_mc_special_registers() 2538 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in iceland_set_mc_special_registers() 2553 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; in iceland_set_mc_special_registers() 2554 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; in iceland_set_mc_special_registers() [all …]
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| A D | ci_smumgr.c | 2547 table->mc_reg_address[i].s0 = in ci_set_s0_mc_reg_index() 2549 ? address : table->mc_reg_address[i].s1; in ci_set_s0_mc_reg_index() 2565 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ci_copy_vbios_smc_reg_table() 2594 switch (table->mc_reg_address[i].s1) { in ci_set_mc_special_registers() 2598 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in ci_set_mc_special_registers() 2599 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in ci_set_mc_special_registers() 2610 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in ci_set_mc_special_registers() 2611 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in ci_set_mc_special_registers() 2625 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; in ci_set_mc_special_registers() 2626 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; in ci_set_mc_special_registers() [all …]
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| A D | tonga_smumgr.c | 2936 table->mc_reg_address[i].s0 = in tonga_set_s0_mc_reg_index() 2940 table->mc_reg_address[i].s1; in tonga_set_s0_mc_reg_index() 2956 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in tonga_copy_vbios_smc_reg_table() 2985 switch (table->mc_reg_address[i].s1) { in tonga_set_mc_special_registers() 2990 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in tonga_set_mc_special_registers() 2991 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in tonga_set_mc_special_registers() 3002 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in tonga_set_mc_special_registers() 3003 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_MRS_LP; in tonga_set_mc_special_registers() 3017 table->mc_reg_address[j].s1 = mmMC_PMG_AUTO_CMD; in tonga_set_mc_special_registers() 3018 table->mc_reg_address[j].s0 = mmMC_PMG_AUTO_CMD; in tonga_set_mc_special_registers() [all …]
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| /linux/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| A D | si_dpm.h | 279 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member 632 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member 940 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
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| A D | si_dpm.c | 5840 switch (table->mc_reg_address[i].s1) { in si_set_mc_special_registers() 5843 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS; in si_set_mc_special_registers() 5844 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP; in si_set_mc_special_registers() 5854 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS; in si_set_mc_special_registers() 5855 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP; in si_set_mc_special_registers() 5868 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD; in si_set_mc_special_registers() 5869 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD; in si_set_mc_special_registers() 5878 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1; in si_set_mc_special_registers() 5970 table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in si_set_s0_mc_reg_index() 5971 address : table->mc_reg_address[i].s1; in si_set_s0_mc_reg_index() [all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_atombios.h | 115 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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| A D | amdgpu_atombios.c | 1471 reg_table->mc_reg_address[i].s1 = in amdgpu_atombios_init_mc_reg_table() 1473 reg_table->mc_reg_address[i].pre_reg_data = in amdgpu_atombios_init_mc_reg_table() 1489 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in amdgpu_atombios_init_mc_reg_table() 1493 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in amdgpu_atombios_init_mc_reg_table()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| A D | ppatomctrl.h | 242 pp_atomctrl_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
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| A D | ppatomctrl.c | 69 if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing() 74 } else if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing() 119 table->mc_reg_address[i].s1 = in atomctrl_set_mc_reg_address_table() 121 table->mc_reg_address[i].uc_pre_reg_data = in atomctrl_set_mc_reg_address_table()
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