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Searched refs:mcr (Results 1 – 25 of 167) sorted by relevance

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/linux/arch/arm/mm/
A Dproc-arm940.S289 mcr p15, 0, r0, c6, c4, 0
290 mcr p15, 0, r0, c6, c5, 0
291 mcr p15, 0, r0, c6, c6, 0
292 mcr p15, 0, r0, c6, c7, 0
295 mcr p15, 0, r0, c6, c4, 1
296 mcr p15, 0, r0, c6, c5, 1
297 mcr p15, 0, r0, c6, c6, 1
298 mcr p15, 0, r0, c6, c7, 1
302 mcr p15, 0, r0, c6, c0, 1
308 mcr p15, 0, r3, c6, c1, 1
[all …]
A Dproc-mohawk.S66 mcr p15, 0, ip, c7, c10, 4 @ drain WB
190 mcr p15, 0, r0, c7, c10, 4 @ drain WB
212 mcr p15, 0, r0, c7, c10, 4 @ drain WB
239 mcr p15, 0, r0, c7, c10, 4 @ drain WB
258 mcr p15, 0, r0, c7, c10, 4 @ drain WB
276 mcr p15, 0, r0, c7, c10, 4 @ drain WB
309 mcr p15, 0, r0, c7, c10, 4 @ drain WB
325 mcr p15, 0, ip, c7, c10, 4 @ drain WB
343 mcr p15, 0, r0, c7, c10, 4 @ drain WB
373 mcr p15, 0, r6, c13, c0, 0 @ PID
[all …]
A Dproc-arm1020.S89 mcr p15, 0, ip, c7, c10, 4 @ drain WB
145 mcr p15, 0, ip, c7, c10, 4 @ drain WB
149 mcr p15, 0, ip, c7, c10, 4 @ drain WB
180 mcr p15, 0, ip, c7, c10, 4
182 mcr p15, 0, ip, c7, c10, 4 @ drain WB
224 mcr p15, 0, ip, c7, c10, 4
228 mcr p15, 0, ip, c7, c10, 4 @ drain WB
332 mcr p15, 0, ip, c7, c10, 4
393 mcr p15, 0, r3, c7, c10, 4
400 mcr p15, 0, ip, c7, c10, 4
[all …]
A Dproc-fa526.S41 mcr p15, 0, r0, c1, c0, 0 @ disable caches
62 mcr p15, 0, ip, c7, c10, 4 @ drain WB
70 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
86 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
90 mcr p15, 0, r0, c7, c10, 4 @ drain WB
115 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
117 mcr p15, 0, ip, c8, c7, 0 @ invalidate UTLB
132 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
134 mcr p15, 0, r0, c7, c10, 4 @ drain WB
151 mcr p15, 0, r0, c1, c1, 0 @ turn-on ECR
[all …]
A Dproc-arm946.S65 mcr p15, 0, ip, c7, c10, 4 @ drain WB
199 mcr p15, 0, r0, c7, c10, 4 @ drain WB
222 mcr p15, 0, r0, c7, c10, 4 @ drain WB
250 mcr p15, 0, r0, c7, c10, 4 @ drain WB
342 mcr p15, 0, r0, c6, c4, 0
343 mcr p15, 0, r0, c6, c5, 0
344 mcr p15, 0, r0, c6, c6, 0
345 mcr p15, 0, r0, c6, c7, 0
353 mcr p15, 0, r3, c6, c1, 0
358 mcr p15, 0, r3, c6, c2, 0
[all …]
A Dproc-arm926.S73 mcr p15, 0, ip, c7, c10, 4 @ drain WB
217 mcr p15, 0, r0, c7, c10, 4 @ drain WB
239 mcr p15, 0, r0, c7, c10, 4 @ drain WB
268 mcr p15, 0, r0, c7, c10, 4 @ drain WB
289 mcr p15, 0, r0, c7, c10, 4 @ drain WB
311 mcr p15, 0, r0, c7, c10, 4 @ drain WB
346 mcr p15, 0, r0, c7, c10, 4 @ drain WB
372 mcr p15, 0, ip, c7, c10, 4 @ drain WB
415 mcr p15, 0, r4, c13, c0, 0 @ PID
416 mcr p15, 0, r5, c3, c0, 0 @ Domain ID
[all …]
A Dproc-arm925.S113 mcr p15, 0, ip, c7, c10, 4 @ drain WB
120 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
254 mcr p15, 0, r0, c7, c10, 4 @ drain WB
276 mcr p15, 0, r0, c7, c10, 4 @ drain WB
305 mcr p15, 0, r0, c7, c10, 4 @ drain WB
326 mcr p15, 0, r0, c7, c10, 4 @ drain WB
348 mcr p15, 0, r0, c7, c10, 4 @ drain WB
383 mcr p15, 0, r0, c7, c10, 4 @ drain WB
410 mcr p15, 0, ip, c7, c10, 4 @ drain WB
430 mcr p15, 0, r0, c7, c10, 4 @ drain WB
[all …]
A Dcache-v6.S52 mcr p15, 0, r0, c7, c5, 0 @ invalidate I-cache
69 mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
143 USER( mcr p15, 0, r0, c7, c10, 1 ) @ clean D line
150 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
157 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
194 mcr p15, 0, r0, c7, c10, 4
226 mcr p15, 0, r0, c7, c6, 1 @ invalidate D line
234 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
246 mcr p15, 0, r0, c7, c10, 1 @ clean D line
248 mcr p15, 0, r0, c7, c11, 1 @ clean unified line
[all …]
A Dproc-sa1100.S59 mcr p15, 0, r0, c1, c0, 0 @ disable caches
77 mcr p15, 0, ip, c7, c10, 4 @ drain WB
84 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
152 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB
171 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
172 mcr p15, 0, r0, c7, c10, 4 @ drain WB
192 mcr p15, 0, ip, c8, c7, 0 @ flush I+D TLBs
193 mcr p15, 0, ip, c7, c7, 0 @ flush I&D cache
194 mcr p15, 0, ip, c9, c0, 0 @ invalidate RB
197 mcr p15, 0, r4, c3, c0, 0 @ domain ID
[all …]
A Dproc-arm920.S63 mcr p15, 0, r0, c1, c0, 0 @ disable caches
81 mcr p15, 0, ip, c7, c10, 4 @ drain WB
205 mcr p15, 0, r0, c7, c10, 4 @ drain WB
227 mcr p15, 0, r0, c7, c10, 4 @ drain WB
254 mcr p15, 0, r0, c7, c10, 4 @ drain WB
273 mcr p15, 0, r0, c7, c10, 4 @ drain WB
290 mcr p15, 0, r0, c7, c10, 4 @ drain WB
358 mcr p15, 0, ip, c7, c10, 4 @ drain WB
376 mcr p15, 0, r0, c7, c10, 4 @ drain WB
399 mcr p15, 0, r4, c13, c0, 0 @ PID
[all …]
A Dproc-v6.S46 mcr p15, 0, r0, c1, c0, 0 @ disable caches
64 mcr p15, 0, r1, c1, c0, 0 @ disable MMU
66 mcr p15, 0, r1, c7, c5, 4 @ ISB
109 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
111 mcr p15, 0, r0, c2, c0, 0 @ set TTB 0
118 mcr p15, 0, r1, c13, c0, 1 @ set context ID
168 mcr p15, 0, r4, c13, c0, 0 @ FCSE/PID
170 mcr p15, 0, r5, c3, c0, 0 @ Domain ID
179 mcr p15, 0, ip, c7, c5, 4 @ ISB
209 ALT_SMP(mcr p15, 0, r0, c1, c0, 1)
[all …]
A Dproc-feroceon.S74 mcr p15, 1, r0, c15, c9, 0 @ clean L2
75 mcr p15, 0, r0, c7, c10, 4 @ drain WB
99 mcr p15, 0, ip, c7, c10, 4 @ drain WB
233 mcr p15, 0, r0, c7, c10, 4 @ drain WB
256 mcr p15, 0, r0, c7, c10, 4 @ drain WB
271 mcr p15, 0, r0, c7, c10, 4 @ drain WB
299 mcr p15, 0, r0, c7, c10, 4 @ drain WB
335 mcr p15, 0, r0, c7, c10, 4 @ drain WB
348 mcr p15, 0, r0, c7, c10, 4 @ drain WB
515 mcr p15, 0, r4, c13, c0, 0 @ PID
[all …]
A Dproc-arm922.S65 mcr p15, 0, r0, c1, c0, 0 @ disable caches
83 mcr p15, 0, ip, c7, c10, 4 @ drain WB
90 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
207 mcr p15, 0, r0, c7, c10, 4 @ drain WB
229 mcr p15, 0, r0, c7, c10, 4 @ drain WB
256 mcr p15, 0, r0, c7, c10, 4 @ drain WB
275 mcr p15, 0, r0, c7, c10, 4 @ drain WB
292 mcr p15, 0, r0, c7, c10, 4 @ drain WB
361 mcr p15, 0, ip, c7, c10, 4 @ drain WB
378 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
[all …]
A Dproc-xscale.S119 mcr p15, 0, r1, c1, c0, 1
130 mcr p15, 0, r0, c1, c0, 0 @ disable caches
150 mcr p15, 0, r1, c10, c4, 1 @ unlock I-TLB
151 mcr p15, 0, r1, c8, c5, 0 @ invalidate I-TLB
157 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
160 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
182 mcr p14, 0, r0, c7, c0, 0 @ Go to IDLE
296 mcr p15, 0, r0, c7, c5, 6 @ Invalidate BTB
532 mcr p15, 0, r5, c15, c1, 0 @ CP access reg
533 mcr p15, 0, r6, c13, c0, 0 @ PID
[all …]
A Dproc-xsc3.S94 mcr p15, 0, r0, c1, c0, 0 @ disable caches
115 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
118 mcr p15, 0, r1, c1, c0, 0 @ ctrl register
140 mcr p14, 0, r0, c7, c0, 0 @ go to idle
240 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
262 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
371 mcr p15, 0, ip, c7, c5, 4 @ prefetch flush
444 mcr p15, 0, r5, c15, c1, 0 @ CP access reg
445 mcr p15, 0, r6, c13, c0, 0 @ PID
446 mcr p15, 0, r7, c3, c0, 0 @ domain ID
[all …]
A Dproc-arm1022.S71 mcr p15, 0, r0, c1, c0, 0 @ disable caches
89 mcr p15, 0, ip, c7, c10, 4 @ drain WB
96 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
222 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
230 mcr p15, 0, ip, c7, c10, 4 @ drain WB
253 mcr p15, 0, ip, c7, c10, 4 @ drain WB
283 mcr p15, 0, ip, c7, c10, 4 @ drain WB
305 mcr p15, 0, ip, c7, c10, 4 @ drain WB
325 mcr p15, 0, ip, c7, c10, 4 @ drain WB
390 mcr p15, 0, r1, c7, c10, 4 @ drain WB
[all …]
A Dproc-arm1026.S71 mcr p15, 0, r0, c1, c0, 0 @ disable caches
89 mcr p15, 0, ip, c7, c10, 4 @ drain WB
96 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
217 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
225 mcr p15, 0, ip, c7, c10, 4 @ drain WB
248 mcr p15, 0, ip, c7, c10, 4 @ drain WB
278 mcr p15, 0, ip, c7, c10, 4 @ drain WB
300 mcr p15, 0, ip, c7, c10, 4 @ drain WB
320 mcr p15, 0, ip, c7, c10, 4 @ drain WB
380 mcr p15, 0, r1, c7, c10, 4 @ drain WB
[all …]
A Dproc-arm1020e.S71 mcr p15, 0, r0, c1, c0, 0 @ disable caches
89 mcr p15, 0, ip, c7, c10, 4 @ drain WB
96 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
145 mcr p15, 0, ip, c7, c10, 4 @ drain WB
231 mcr p15, 0, ip, c7, c10, 4 @ drain WB
254 mcr p15, 0, ip, c7, c10, 4 @ drain WB
284 mcr p15, 0, ip, c7, c10, 4 @ drain WB
306 mcr p15, 0, ip, c7, c10, 4 @ drain WB
326 mcr p15, 0, ip, c7, c10, 4 @ drain WB
379 mcr p15, 0, r3, c7, c10, 4
[all …]
A Dproc-sa110.S38 mcr p15, 0, r0, c15, c1, 2 @ Enable clock switching
47 mcr p15, 0, r0, c15, c2, 2 @ Disable clock switching
51 mcr p15, 0, r0, c1, c0, 0 @ disable caches
68 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
69 mcr p15, 0, ip, c7, c10, 4 @ drain WB
71 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
76 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
121 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
143 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
160 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
[all …]
A Dcache-fa.S45 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
133 mcr p15, 0, r0, c7, c5, 1 @ invalidate I entry
138 mcr p15, 0, r0, c7, c5, 6 @ invalidate BTB
139 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
140 mcr p15, 0, r0, c7, c5, 4 @ prefetch flush
160 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
161 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
188 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
201 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
206 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
[all …]
A Dproc-arm740.S51 mcr p15, 0, r0, c1, c0, 0 @ disable caches
63 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
66 mcr p15, 0, ip, c1, c0, 0 @ ctrl register
76 mcr p15, 0, r0, c6, c3 @ disable area 3~7
77 mcr p15, 0, r0, c6, c4
78 mcr p15, 0, r0, c6, c5
79 mcr p15, 0, r0, c6, c6
80 mcr p15, 0, r0, c6, c7
83 mcr p15, 0, r0, c6, c0 @ set area 0, default
93 mcr p15, 0, r0, c6, c1 @ set area 1, RAM
[all …]
A Dtlb-v6.S40 mcr p15, 0, ip, c7, c10, 4 @ drain write buffer
49 mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA (was 1)
53 mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate MVA (was 1)
58 mcr p15, 0, ip, c7, c10, 4 @ data synchronization barrier
72 mcr p15, 0, r2, c7, c10, 4 @ drain write buffer
79 mcr p15, 0, r0, c8, c6, 1 @ TLB invalidate D MVA
80 mcr p15, 0, r0, c8, c5, 1 @ TLB invalidate I MVA
82 mcr p15, 0, r0, c8, c7, 1 @ TLB invalidate MVA
87 mcr p15, 0, r2, c7, c10, 4 @ data synchronization barrier
88 mcr p15, 0, r2, c7, c5, 4 @ prefetch flush (isb)
/linux/drivers/iio/adc/
A Dimx93_adc.c104 u32 mcr, msr; in imx93_adc_power_down() local
107 mcr = readl(adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
109 writel(mcr, adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
123 u32 mcr; in imx93_adc_power_up() local
126 mcr = readl(adc->regs + IMX93_ADC_MCR); in imx93_adc_power_up()
128 writel(mcr, adc->regs + IMX93_ADC_MCR); in imx93_adc_power_up()
133 u32 mcr; in imx93_adc_config_ad_clk() local
139 mcr = readl(adc->regs + IMX93_ADC_MCR); in imx93_adc_config_ad_clk()
141 writel(mcr, adc->regs + IMX93_ADC_MCR); in imx93_adc_config_ad_clk()
148 u32 mcr, msr; in imx93_adc_calibration() local
[all …]
/linux/drivers/w1/masters/
A Dsgi_w1.c23 u32 __iomem *mcr; member
28 static u8 sgi_w1_wait(u32 __iomem *mcr) in sgi_w1_wait() argument
33 mcr_val = readl(mcr); in sgi_w1_wait()
49 writel(MCR_PACK(520, 65), dev->mcr); in sgi_w1_reset_bus()
50 ret = sgi_w1_wait(dev->mcr); in sgi_w1_reset_bus()
66 writel(MCR_PACK(6, 13), dev->mcr); in sgi_w1_touch_bit()
68 writel(MCR_PACK(80, 30), dev->mcr); in sgi_w1_touch_bit()
70 ret = sgi_w1_wait(dev->mcr); in sgi_w1_touch_bit()
86 sdev->mcr = devm_platform_ioremap_resource(pdev, 0); in sgi_w1_probe()
87 if (IS_ERR(sdev->mcr)) in sgi_w1_probe()
[all …]
/linux/drivers/mtd/nand/raw/
A Dtxx9ndfmc.c113 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_write_buf() local
118 txx9ndfmc_write(dev, mcr, TXX9_NDFMCR); in txx9ndfmc_write_buf()
138 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_cmd_ctrl() local
144 mcr |= ctrl & NAND_NCE ? TXX9_NDFMCR_CE : 0; in txx9ndfmc_cmd_ctrl()
146 mcr &= ~TXX9_NDFMCR_CS_MASK; in txx9ndfmc_cmd_ctrl()
147 mcr |= TXX9_NDFMCR_CS(txx9_priv->cs); in txx9ndfmc_cmd_ctrl()
149 txx9ndfmc_write(dev, mcr, TXX9_NDFMCR); in txx9ndfmc_cmd_ctrl()
172 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_calculate_ecc() local
174 mcr &= ~TXX9_NDFMCR_ECC_ALL; in txx9ndfmc_calculate_ecc()
211 u32 mcr = txx9ndfmc_read(dev, TXX9_NDFMCR); in txx9ndfmc_enable_hwecc() local
[all …]

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