| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_amdkfd_gfx_v10_3.c | 60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
63 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
112 uint32_t mec; in init_interrupts_v10_3() local
115 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v10_3()
118 lock_srbm(adev, mec, pipe, 0, 0); in init_interrupts_v10_3()
195 uint32_t value, mec, pipe; in hqd_load_v10_3() local
197 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v10_3()
201 mec, pipe, queue_id); in hqd_load_v10_3()
282 uint32_t mec, pipe; in hiq_mqd_load_v10_3() local
289 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v10_3()
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| A D | amdgpu_amdkfd_gfx_v11.c | 58 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
61 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
108 uint32_t mec; in init_interrupts_v11() local
111 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v11()
114 lock_srbm(adev, mec, pipe, 0, 0); in init_interrupts_v11()
180 uint32_t value, mec, pipe; in hqd_load_v11() local
182 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v11()
186 mec, pipe, queue_id); in hqd_load_v11()
267 uint32_t mec, pipe; in hiq_mqd_load_v11() local
274 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v11()
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| A D | amdgpu_amdkfd_gfx_v8.c | 60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
63 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
115 uint32_t mec; in kgd_init_interrupts() local
118 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
119 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
121 lock_srbm(adev, mec, pipe, 0, 0); in kgd_init_interrupts()
170 uint32_t value, mec, pipe; in kgd_hqd_load() local
172 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hqd_load()
173 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_hqd_load()
176 mec, pipe, queue_id); in kgd_hqd_load()
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| A D | amdgpu_amdkfd_gfx_v12.c | 30 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm() argument
34 soc24_grbm_select(adev, mec, pipe, queue, vmid); in lock_srbm()
46 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
47 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
49 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
59 uint32_t mec; in init_interrupts_v12() local
62 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v12()
63 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v12()
65 lock_srbm(adev, mec, pipe, 0, 0); in init_interrupts_v12()
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| A D | amdgpu_gfx.c | 51 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
52 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
60 int *mec, int *pipe, int *queue) in amdgpu_queue_mask_bit_to_mec_queue() argument
64 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
65 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
173 return adev->gfx.mec.num_mec > 1; in amdgpu_gfx_is_compute_multipipe_capable()
279 int mec, pipe, queue; in amdgpu_gfx_kiq_acquire() local
281 queue_bit = adev->gfx.mec.num_mec in amdgpu_gfx_kiq_acquire()
299 ring->me = mec + 1; in amdgpu_gfx_kiq_acquire()
495 kfree(adev->gfx.mec.mqd_backup[j]); in amdgpu_gfx_mqd_sw_fini()
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| A D | amdgpu_amdkfd_gfx_v7.c | 48 static void lock_srbm(struct amdgpu_device *adev, uint32_t mec, uint32_t pipe, in lock_srbm() argument
51 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue); in lock_srbm()
66 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
67 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
69 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
120 uint32_t mec; in kgd_init_interrupts() local
123 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
124 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
126 lock_srbm(adev, mec, pipe, 0, 0); in kgd_init_interrupts()
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| A D | amdgpu_amdkfd_gfx_v9.c | 66 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_acquire_queue() local
163 uint32_t mec; in kgd_gfx_v9_init_interrupts() local
166 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_init_interrupts()
167 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_init_interrupts()
169 kgd_gfx_v9_lock_srbm(adev, mec, pipe, 0, 0, inst); in kgd_gfx_v9_init_interrupts()
307 uint32_t mec, pipe; in kgd_gfx_v9_hiq_mqd_load() local
314 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_hiq_mqd_load()
318 mec, pipe, queue_id); in kgd_gfx_v9_hiq_mqd_load()
333 PACKET3_MAP_QUEUES_ME((mec - 1)) | in kgd_gfx_v9_hiq_mqd_load()
1044 max_queue_cnt = adev->gfx.mec.num_pipe_per_mec * in kgd_gfx_v9_get_cu_occupancy()
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| A D | amdgpu_amdkfd_gfx_v10.c | 48 nv_grbm_select(adev, mec, pipe, queue, vmid); in lock_srbm()
60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue() local
63 lock_srbm(adev, mec, pipe, queue_id, 0); in acquire_queue()
143 uint32_t mec; in kgd_init_interrupts() local
146 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
147 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
149 lock_srbm(adev, mec, pipe, 0, 0); in kgd_init_interrupts()
296 uint32_t mec, pipe; in kgd_hiq_mqd_load() local
303 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hiq_mqd_load()
307 mec, pipe, queue_id); in kgd_hiq_mqd_load()
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| A D | gfx_v12_0.c | 758 &adev->gfx.mec.hpd_eop_obj, in gfx_v12_0_mec_init()
935 ring->me = mec + 1; in gfx_v12_0_compute_ring_init()
1297 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v12_0_alloc_ip_dump()
1298 adev->gfx.mec.num_queue_per_pipe; in gfx_v12_0_alloc_ip_dump()
1335 adev->gfx.mec.num_mec = 2; in gfx_v12_0_sw_init()
1336 adev->gfx.mec.num_pipe_per_mec = 2; in gfx_v12_0_sw_init()
1343 adev->gfx.mec.num_mec = 1; in gfx_v12_0_sw_init()
1344 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v12_0_sw_init()
2703 &adev->gfx.mec.mec_fw_obj, in gfx_v12_0_cp_compute_load_microcode_rs64()
5061 adev->gfx.mec.num_mec, in gfx_v12_ip_print()
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| A D | gfx_v9_4_3.c | 675 &adev->gfx.mec.mec_fw_obj, in gfx_v9_4_3_mec_init()
997 ring->me = mec + 1; in gfx_v9_4_3_compute_ring_init()
1040 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_alloc_ip_dump()
1041 adev->gfx.mec.num_queue_per_pipe; in gfx_v9_4_3_alloc_ip_dump()
1076 adev->gfx.mec.num_mec = 2; in gfx_v9_4_3_sw_init()
1077 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_4_3_sw_init()
4612 num_inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_ip_print()
4613 adev->gfx.mec.num_queue_per_pipe; in gfx_v9_4_3_ip_print()
4618 adev->gfx.mec.num_mec, in gfx_v9_4_3_ip_print()
4673 num_inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_ip_dump()
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| A D | gfx_v11_0.c | 1135 ring->me = mec + 1; in gfx_v11_0_compute_ring_init()
1514 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v11_0_alloc_ip_dump()
1515 adev->gfx.mec.num_queue_per_pipe; in gfx_v11_0_alloc_ip_dump()
1552 adev->gfx.mec.num_mec = 2; in gfx_v11_0_sw_init()
1553 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1564 adev->gfx.mec.num_mec = 1; in gfx_v11_0_sw_init()
1565 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1572 adev->gfx.mec.num_mec = 1; in gfx_v11_0_sw_init()
3697 &adev->gfx.mec.mec_fw_obj, in gfx_v11_0_cp_compute_load_microcode()
3754 &adev->gfx.mec.mec_fw_obj, in gfx_v11_0_cp_compute_load_microcode_rs64()
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| A D | amdgpu_gfx.h | 366 struct amdgpu_mec mec; member
531 int amdgpu_gfx_mec_queue_to_bit(struct amdgpu_device *adev, int mec,
534 int *mec, int *pipe, int *queue);
536 int mec, int pipe, int queue);
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| A D | gfx_v9_0.c | 1877 &adev->gfx.mec.hpd_eop_obj, in gfx_v9_0_mec_init()
1901 &adev->gfx.mec.mec_fw_obj, in gfx_v9_0_mec_init()
2151 ring->me = mec + 1; in gfx_v9_0_compute_ring_init()
2189 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_0_alloc_ip_dump()
2190 adev->gfx.mec.num_queue_per_pipe; in gfx_v9_0_alloc_ip_dump()
2218 adev->gfx.mec.num_mec = 2; in gfx_v9_0_sw_init()
2221 adev->gfx.mec.num_mec = 1; in gfx_v9_0_sw_init()
2231 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_0_sw_init()
2232 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v9_0_sw_init()
7339 adev->gfx.mec.num_mec, in gfx_v9_ip_print()
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| A D | gfx_v7_0.c | 2736 mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec in gfx_v7_0_mec_init()
2742 &adev->gfx.mec.hpd_eop_obj, in gfx_v7_0_mec_init()
2743 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v7_0_mec_init()
2761 int mec, int pipe) in gfx_v7_0_compute_pipe_init() argument
2765 size_t eop_offset = (mec * adev->gfx.mec.num_pipe_per_mec + pipe) in gfx_v7_0_compute_pipe_init()
4315 int mec, int pipe, int queue) in gfx_v7_0_compute_ring_init() argument
4322 ring->me = mec + 1; in gfx_v7_0_compute_ring_init()
4354 adev->gfx.mec.num_mec = 2; in gfx_v7_0_sw_init()
4361 adev->gfx.mec.num_mec = 1; in gfx_v7_0_sw_init()
4364 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v7_0_sw_init()
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| A D | amdgpu_amdkfd.c | 180 .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec, in amdgpu_amdkfd_device_init()
181 .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe, in amdgpu_amdkfd_device_init()
201 * adev->gfx.mec.num_pipe_per_mec in amdgpu_amdkfd_device_init()
202 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_amdkfd_device_init()
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| A D | gfx_v10_0.c | 4393 &adev->gfx.mec.mec_fw_obj, in gfx_v10_0_mec_init()
4623 ring->me = mec + 1; in gfx_v10_0_compute_ring_init()
4661 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v10_0_alloc_ip_dump()
4662 adev->gfx.mec.num_queue_per_pipe; in gfx_v10_0_alloc_ip_dump()
4701 adev->gfx.mec.num_mec = 2; in gfx_v10_0_sw_init()
4702 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4716 adev->gfx.mec.num_mec = 2; in gfx_v10_0_sw_init()
4717 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4724 adev->gfx.mec.num_mec = 1; in gfx_v10_0_sw_init()
9591 adev->gfx.mec.num_mec, in gfx_v10_ip_print()
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| A D | gfx_v8_0.c | 1314 &adev->gfx.mec.hpd_eop_obj, in gfx_v8_0_mec_init()
1315 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v8_0_mec_init()
1324 amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); in gfx_v8_0_mec_init()
1858 int mec, int pipe, int queue) in gfx_v8_0_compute_ring_init() argument
1868 ring->me = mec + 1; in gfx_v8_0_compute_ring_init()
1912 adev->gfx.mec.num_mec = 2; in gfx_v8_0_sw_init()
1917 adev->gfx.mec.num_mec = 1; in gfx_v8_0_sw_init()
1921 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v8_0_sw_init()
1922 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v8_0_sw_init()
4647 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v8_0_kcq_init_queue()
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| /linux/Documentation/translations/zh_CN/process/ |
| A D | magic-number.rst | 43 <mailto:mec@shout.net>
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| /linux/Documentation/translations/zh_TW/process/ |
| A D | magic-number.rst | 39 <mailto:mec@shout.net>
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| /linux/drivers/gpu/drm/radeon/ |
| A D | cik.c | 4362 if (rdev->mec.hpd_eop_obj) { in cik_mec_fini()
4370 rdev->mec.hpd_eop_obj = NULL; in cik_mec_fini()
4386 rdev->mec.num_mec = 2; in cik_mec_init()
4388 rdev->mec.num_mec = 1; in cik_mec_init()
4389 rdev->mec.num_pipe = 4; in cik_mec_init()
4390 rdev->mec.num_queue = rdev->mec.num_mec * rdev->mec.num_pipe * 8; in cik_mec_init()
4394 rdev->mec.num_mec *rdev->mec.num_pipe * MEC_HPD_SIZE * 2, in cik_mec_init()
4397 &rdev->mec.hpd_eop_obj); in cik_mec_init()
4410 &rdev->mec.hpd_eop_gpu_addr); in cik_mec_init()
4424 memset(hpd, 0, rdev->mec.num_mec *rdev->mec.num_pipe * MEC_HPD_SIZE * 2); in cik_mec_init()
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| /linux/Documentation/staging/ |
| A D | magic-number.rst | 41 <mailto:mec@shout.net>
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| /linux/Documentation/translations/it_IT/process/ |
| A D | magic-number.rst | 46 <mailto:mec@shout.net>
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| /linux/Documentation/translations/sp_SP/process/ |
| A D | magic-number.rst | 47 <mailto:mec@shout.net>
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_device_queue_manager.c | 79 static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe) in is_pipe_enabled() argument
82 int pipe_offset = (mec * dqm->dev->kfd->shared_resources.num_pipe_per_mec in is_pipe_enabled()
1658 int i, mec; in set_sched_resources() local
1666 mec = (i / dqm->dev->kfd->shared_resources.num_queue_per_pipe) in set_sched_resources()
1673 if (mec > 0) in set_sched_resources()
2125 uint32_t mec, pipe, queue; in detect_queue_hang() local
2128 mec = (i / dqm->dev->kfd->shared_resources.num_queue_per_pipe) in detect_queue_hang()
2131 if (mec || !test_bit(i, dqm->dev->kfd->shared_resources.cp_queue_bitmap)) in detect_queue_hang()
2134 amdgpu_queue_mask_bit_to_mec_queue(dqm->dev->adev, i, &mec, &pipe, &queue); in detect_queue_hang()
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| /linux/Documentation/userspace-api/ioctl/ |
| A D | ioctl-number.rst | 8 <mec@shout.net>
33 patch to Linus Torvalds. Or you can e-mail me at <mec@shout.net> and
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