| /linux/drivers/gpu/drm/panel/ |
| A D | panel-boe-tv101wum-nl6.c | 64 mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); in nt36523_enable_reload_cmds()
73 mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0xd9); in boe_tv110c9m_init()
74 mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x78); in boe_tv110c9m_init()
75 mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x5a); in boe_tv110c9m_init()
76 mipi_dsi_dcs_write_seq_multi(&ctx, 0x0d, 0x63); in boe_tv110c9m_init()
77 mipi_dsi_dcs_write_seq_multi(&ctx, 0x0e, 0x91); in boe_tv110c9m_init()
78 mipi_dsi_dcs_write_seq_multi(&ctx, 0x0f, 0x73); in boe_tv110c9m_init()
428 mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); in boe_tv110c9m_init()
432 mipi_dsi_dcs_write_seq_multi(&ctx, 0x29); in boe_tv110c9m_init()
827 mipi_dsi_dcs_write_seq_multi(&ctx, 0x11); in inx_hj110iz_init()
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| A D | panel-jadard-jd9365da-h3.c | 56 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe1, 0x93); in jadard_enable_standard_cmds()
57 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe2, 0x65); in jadard_enable_standard_cmds()
58 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0xe3, 0xf8); in jadard_enable_standard_cmds()
59 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x80, 0x03); in jadard_enable_standard_cmds()
195 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x00); in radxa_display_8hd_ad002_init_cmds()
196 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x7E); in radxa_display_8hd_ad002_init_cmds()
197 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x00); in radxa_display_8hd_ad002_init_cmds()
198 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x65); in radxa_display_8hd_ad002_init_cmds()
199 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x74); in radxa_display_8hd_ad002_init_cmds()
200 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x00); in radxa_display_8hd_ad002_init_cmds()
[all …]
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| A D | panel-ilitek-ili9882t.c | 71 mipi_dsi_dcs_write_seq_multi(&ctx, 0x00, 0x42); in starry_ili9882t_init()
72 mipi_dsi_dcs_write_seq_multi(&ctx, 0x01, 0x11); in starry_ili9882t_init()
73 mipi_dsi_dcs_write_seq_multi(&ctx, 0x02, 0x00); in starry_ili9882t_init()
74 mipi_dsi_dcs_write_seq_multi(&ctx, 0x03, 0x00); in starry_ili9882t_init()
76 mipi_dsi_dcs_write_seq_multi(&ctx, 0x04, 0x01); in starry_ili9882t_init()
77 mipi_dsi_dcs_write_seq_multi(&ctx, 0x05, 0x11); in starry_ili9882t_init()
78 mipi_dsi_dcs_write_seq_multi(&ctx, 0x06, 0x00); in starry_ili9882t_init()
79 mipi_dsi_dcs_write_seq_multi(&ctx, 0x07, 0x00); in starry_ili9882t_init()
81 mipi_dsi_dcs_write_seq_multi(&ctx, 0x08, 0x80); in starry_ili9882t_init()
82 mipi_dsi_dcs_write_seq_multi(&ctx, 0x09, 0x81); in starry_ili9882t_init()
[all …]
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| A D | panel-ilitek-ili9806e.c | 232 mipi_dsi_dcs_write_seq_multi(ctx, 0x08, 0x18); in com35h3p70ulc_init()
233 mipi_dsi_dcs_write_seq_multi(ctx, 0x21, 0x01); in com35h3p70ulc_init()
235 mipi_dsi_dcs_write_seq_multi(ctx, 0x30, 0x03); in com35h3p70ulc_init()
236 mipi_dsi_dcs_write_seq_multi(ctx, 0x31, 0x00); in com35h3p70ulc_init()
237 mipi_dsi_dcs_write_seq_multi(ctx, 0x60, 0x0d); in com35h3p70ulc_init()
238 mipi_dsi_dcs_write_seq_multi(ctx, 0x61, 0x08); in com35h3p70ulc_init()
239 mipi_dsi_dcs_write_seq_multi(ctx, 0x62, 0x08); in com35h3p70ulc_init()
240 mipi_dsi_dcs_write_seq_multi(ctx, 0x63, 0x09); in com35h3p70ulc_init()
242 mipi_dsi_dcs_write_seq_multi(ctx, 0x40, 0x30); in com35h3p70ulc_init()
243 mipi_dsi_dcs_write_seq_multi(ctx, 0x41, 0x44); in com35h3p70ulc_init()
[all …]
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| A D | panel-novatek-nt36672e.c | 54 mipi_dsi_dcs_write_seq_multi(ctx, 0xfb, 0x01); in nt36672e_enable_reload_cmds()
66 mipi_dsi_dcs_write_seq_multi(ctx, 0xb0, 0x00); in nt36672e_1080x2408_60hz_init()
67 mipi_dsi_dcs_write_seq_multi(ctx, 0xc0, 0x00); in nt36672e_1080x2408_60hz_init()
74 mipi_dsi_dcs_write_seq_multi(ctx, 0x01, 0x66); in nt36672e_1080x2408_60hz_init()
75 mipi_dsi_dcs_write_seq_multi(ctx, 0x06, 0x40); in nt36672e_1080x2408_60hz_init()
76 mipi_dsi_dcs_write_seq_multi(ctx, 0x07, 0x38); in nt36672e_1080x2408_60hz_init()
77 mipi_dsi_dcs_write_seq_multi(ctx, 0x2f, 0x83); in nt36672e_1080x2408_60hz_init()
78 mipi_dsi_dcs_write_seq_multi(ctx, 0x69, 0x91); in nt36672e_1080x2408_60hz_init()
79 mipi_dsi_dcs_write_seq_multi(ctx, 0x95, 0xd1); in nt36672e_1080x2408_60hz_init()
80 mipi_dsi_dcs_write_seq_multi(ctx, 0x96, 0xd1); in nt36672e_1080x2408_60hz_init()
[all …]
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| A D | panel-newvision-nv3051d.c | 57 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x30); in panel_nv3051d_init_sequence()
58 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x52); in panel_nv3051d_init_sequence()
59 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x01); in panel_nv3051d_init_sequence()
60 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE3, 0x00); in panel_nv3051d_init_sequence()
61 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x40); in panel_nv3051d_init_sequence()
62 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x00); in panel_nv3051d_init_sequence()
63 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x03); in panel_nv3051d_init_sequence()
64 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x12); in panel_nv3051d_init_sequence()
65 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x1E); in panel_nv3051d_init_sequence()
66 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x28); in panel_nv3051d_init_sequence()
[all …]
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| A D | panel-himax-hx83102.c | 105 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0xcd); in starry_himax83102_j02_init()
106 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x84); in starry_himax83102_j02_init()
107 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETSPCCMD, 0x3f); in starry_himax83102_j02_init()
114 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETTCON, 0x80); in starry_himax83102_j02_init()
121 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETPANEL, 0x02); in starry_himax83102_j02_init()
154 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x01); in starry_himax83102_j02_init()
162 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x02); in starry_himax83102_j02_init()
168 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x03); in starry_himax83102_j02_init()
176 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETBANK, 0x00); in starry_himax83102_j02_init()
178 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, HX83102_SETMIPI, 0x96); in starry_himax83102_j02_init()
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| A D | panel-sitronix-st7703.c | 167 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETMIPI, in xbd599_init_sequence()
186 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETRGBIF, in xbd599_init_sequence()
197 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETSCR, in xbd599_init_sequence()
221 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETDISP, in xbd599_init_sequence()
231 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETEQ, in xbd599_init_sequence()
253 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETPOWER, in xbd599_init_sequence()
271 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETBGP, in xbd599_init_sequence()
275 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETVCOM, in xbd599_init_sequence()
283 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETGIP1, in xbd599_init_sequence()
294 mipi_dsi_dcs_write_seq_multi(dsi_ctx, ST7703_CMD_SETGIP2, in xbd599_init_sequence()
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| A D | panel-boe-th101mb31ig002-28a.c | 65 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0xab, 0xba); in boe_th101mb31ig002_enable()
66 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0xba, 0xab); in boe_th101mb31ig002_enable()
69 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb3, 0x56, 0x53, 0x00); in boe_th101mb31ig002_enable()
70 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb4, 0x33, 0x30, 0x04); in boe_th101mb31ig002_enable()
96 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xc6, 0x2a, 0x2a); in boe_th101mb31ig002_enable()
98 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca, 0xcb, 0x43); in boe_th101mb31ig002_enable()
107 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x00); in boe_th101mb31ig002_enable()
124 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe0, 0xab, 0xba); in starry_er88577_init_cmd()
125 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe1, 0xba, 0xab); in starry_er88577_init_cmd()
155 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xca, 0xcb, 0x43); in starry_er88577_init_cmd()
[all …]
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| A D | panel-visionox-vtdr6130.c | 55 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, in visionox_vtdr6130_on()
57 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, in visionox_vtdr6130_on()
60 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0x09); in visionox_vtdr6130_on()
61 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6c, 0x01); in visionox_vtdr6130_on()
62 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6d, 0x00); in visionox_vtdr6130_on()
63 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6f, 0x01); in visionox_vtdr6130_on()
104 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x14); in visionox_vtdr6130_on()
107 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x05); in visionox_vtdr6130_on()
108 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf3, 0x0f); in visionox_vtdr6130_on()
111 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf9, 0x00); in visionox_vtdr6130_on()
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| A D | panel-lincolntech-lcd197.c | 52 mipi_dsi_dcs_write_seq_multi(&ctx, 0xb9, 0xff, 0x83, 0x99); in lincoln_lcd197_panel_prepare()
53 mipi_dsi_dcs_write_seq_multi(&ctx, 0xd2, 0x55); in lincoln_lcd197_panel_prepare()
54 mipi_dsi_dcs_write_seq_multi(&ctx, 0xb1, 0x02, 0x04, 0x70, 0x90, 0x01, in lincoln_lcd197_panel_prepare()
57 mipi_dsi_dcs_write_seq_multi(&ctx, 0xb2, 0x00, 0x80, 0x80, 0xae, 0x0a, in lincoln_lcd197_panel_prepare()
81 mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x01); in lincoln_lcd197_panel_prepare()
86 mipi_dsi_dcs_write_seq_multi(&ctx, 0xbd, 0x02); in lincoln_lcd197_panel_prepare()
98 mipi_dsi_dcs_write_seq_multi(&ctx, 0xb6, 0x92, 0x92); in lincoln_lcd197_panel_prepare()
99 mipi_dsi_dcs_write_seq_multi(&ctx, 0xcc, 0x00); in lincoln_lcd197_panel_prepare()
100 mipi_dsi_dcs_write_seq_multi(&ctx, 0xbf, 0x40, 0x41, 0x50, 0x49); in lincoln_lcd197_panel_prepare()
101 mipi_dsi_dcs_write_seq_multi(&ctx, 0xc6, 0xff, 0xf9); in lincoln_lcd197_panel_prepare()
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| A D | panel-lg-sw43408.c | 66 mipi_dsi_dcs_write_seq_multi(&ctx, MIPI_DCS_SET_GAMMA_CURVE, 0x02); in sw43408_program()
70 mipi_dsi_dcs_write_seq_multi(&ctx, 0x53, 0x0c, 0x30); in sw43408_program()
71 mipi_dsi_dcs_write_seq_multi(&ctx, 0x55, 0x00, 0x70, 0xdf, 0x00, 0x70, 0xdf); in sw43408_program()
72 mipi_dsi_dcs_write_seq_multi(&ctx, 0xf7, 0x01, 0x49, 0x0c); in sw43408_program()
80 mipi_dsi_dcs_write_seq_multi(&ctx, 0xb0, 0xac); in sw43408_program()
81 mipi_dsi_dcs_write_seq_multi(&ctx, 0xe5, in sw43408_program()
83 mipi_dsi_dcs_write_seq_multi(&ctx, 0xb5, in sw43408_program()
91 mipi_dsi_dcs_write_seq_multi(&ctx, 0xcd, in sw43408_program()
95 mipi_dsi_dcs_write_seq_multi(&ctx, 0xcb, 0x80, 0x5c, 0x07, 0x03, 0x28); in sw43408_program()
96 mipi_dsi_dcs_write_seq_multi(&ctx, 0xc0, 0x02, 0x02, 0x0f); in sw43408_program()
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| A D | panel-boe-tv101wum-ll2.c | 56 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x5a, 0x0e); in boe_tv101wum_ll2_on()
57 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0xff, 0x81, 0x68, 0x6c, 0x22, in boe_tv101wum_ll2_on()
59 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x5a, 0x23); in boe_tv101wum_ll2_on()
60 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x90, 0x00, 0x00); in boe_tv101wum_ll2_on()
61 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x94, 0x2c, 0x00); in boe_tv101wum_ll2_on()
62 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x5a, 0x19); in boe_tv101wum_ll2_on()
63 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xa2, 0x38); in boe_tv101wum_ll2_on()
91 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x5a); in boe_tv101wum_ll2_off()
92 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x5a); in boe_tv101wum_ll2_off()
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| A D | panel-jdi-fhd-r63452.c | 57 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_ADDRESS_MODE, 0x00); in jdi_fhd_r63452_on()
65 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x24); in jdi_fhd_r63452_on()
66 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00); in jdi_fhd_r63452_on()
67 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_SET_CABC_MIN_BRIGHTNESS, 0x00); in jdi_fhd_r63452_on()
68 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x84, 0x00); in jdi_fhd_r63452_on()
76 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x84, 0x00); in jdi_fhd_r63452_on()
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| A D | panel-novatek-nt35950.c | 278 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xd4, 0x88, 0x88); in nt35950_on()
284 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PARAM_SPR_EN, 0x01); in nt35950_on()
287 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MCS_PARAM_SPR_MODE, in nt35950_on()
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| A D | panel-asus-z00t-tm5p5-n35596.c | 90 mipi_dsi_dcs_write_seq_multi(dsi_ctx, 0x4f, 0x01); in tm5p5_nt35596_off()
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| A D | panel-startek-kd070fhfid015.c | 71 mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, in stk_panel_init()
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| A D | panel-sony-tulip-truly-nt35521.c | 31 mipi_dsi_dcs_write_seq_multi(dsi_ctx, NT35521_DCS_SWITCH_PAGE, \
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| /linux/include/drm/ |
| A D | drm_mipi_dsi.h | 449 #define mipi_dsi_dcs_write_seq_multi(ctx, cmd, seq...) \ macro
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| /linux/Documentation/gpu/ |
| A D | todo.rst | 505 and mipi_dsi_dcs_write_seq_multi() macros instead.
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