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Searched refs:mod_drr_for_pstate (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
A Ddcn401_clk_mgr_smu_msg.c247 void dcn401_smu_indicate_drr_status(struct clk_mgr_internal *clk_mgr, bool mod_drr_for_pstate) in dcn401_smu_indicate_drr_status() argument
249 smu_print("SMU Set indicate drr status = %d\n", mod_drr_for_pstate); in dcn401_smu_indicate_drr_status()
252 DALSMC_MSG_IndicateDrrStatus, mod_drr_for_pstate ? 1 : 0, NULL); in dcn401_smu_indicate_drr_status()
A Ddcn401_clk_mgr_smu_msg.h19 void dcn401_smu_indicate_drr_status(struct clk_mgr_internal *clk_mgr, bool mod_drr_for_pstate);
A Ddcn401_clk_mgr.h52 bool mod_drr_for_pstate; member
A Ddcn401_clk_mgr.c900 params->indicate_drr_status_params.mod_drr_for_pstate); in dcn401_execute_block_sequence()
1044 …block_sequence[num_steps].params.indicate_drr_status_params.mod_drr_for_pstate = clk_mgr_base->clk… in dcn401_build_update_bandwidth_clocks_sequence()
1200 …block_sequence[num_steps].params.indicate_drr_status_params.mod_drr_for_pstate = clk_mgr_base->clk… in dcn401_build_update_bandwidth_clocks_sequence()

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