Searched refs:mode_programming (Results 1 – 8 of 8) sorted by relevance
25 (*dml_ctx)->v21.mode_programming.dml2_instance = (*dml_ctx)->v21.dml_init.dml2_instance; in dml21_allocate_memory()28 (*dml_ctx)->v21.mode_programming.display_config = (*dml_ctx)->v21.mode_support.display_config; in dml21_allocate_memory()31 if (!((*dml_ctx)->v21.mode_programming.programming)) in dml21_allocate_memory()116 kfree(dml2->v21.mode_programming.programming); in dml21_destroy()142 pln_prog = &in_ctx->v21.mode_programming.programming->plane_programming[dml_prog_idx]; in dml21_calculate_rq_and_dlg_params()196 struct dml2_build_mode_programming_in_out *mode_programming = &dml_ctx->v21.mode_programming; in dml21_mode_check_and_programming() local219 result = dml2_build_mode_programming(mode_programming); in dml21_mode_check_and_programming()268 …tx->v21.mode_programming.dml2_instance->scratch.build_mode_programming_locals.mode_programming_par… in dml21_check_mode_support()311 pln_prog = &dml_ctx->v21.mode_programming.programming->plane_programming[dml_prog_idx]; in dml21_prepare_mcache_programming()416 dst_dml_ctx->v21.mode_programming.dml2_instance = dst_dml2_instance; in dml21_copy()[all …]
1028 …context->bw_ctx.bw.dcn.clk.dispclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()1029 …context->bw_ctx.bw.dcn.clk.dcfclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x… in dml21_copy_clocks_to_dc_state()1030 …context->bw_ctx.bw.dcn.clk.dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4… in dml21_copy_clocks_to_dc_state()1031 …context->bw_ctx.bw.dcn.clk.fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.a… in dml21_copy_clocks_to_dc_state()1032 …context->bw_ctx.bw.dcn.clk.idle_dramclk_khz = in_ctx->v21.mode_programming.programming->min_clocks… in dml21_copy_clocks_to_dc_state()1033 …context->bw_ctx.bw.dcn.clk.idle_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dc… in dml21_copy_clocks_to_dc_state()1036 …context->bw_ctx.bw.dcn.clk.p_state_change_support = in_ctx->v21.mode_programming.programming->uclk… in dml21_copy_clocks_to_dc_state()1037 …context->bw_ctx.bw.dcn.clk.dtbclk_en = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.… in dml21_copy_clocks_to_dc_state()1038 …context->bw_ctx.bw.dcn.clk.ref_dtbclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.d… in dml21_copy_clocks_to_dc_state()1060 …watermark->frac_urg_bw_nom = in_ctx->v21.mode_programming.programming->global_regs.wm_regs[reg_set… in dml21_extract_legacy_watermark_set()[all …]
65 …if (dml_ctx->v21.mode_programming.programming->plane_programming[i].plane_descriptor->stream_index… in find_valid_pipe_idx_for_stream_index()105 …dml_stream_index = dml_ctx->v21.mode_programming.programming->plane_programming[dml_plane_idx].pla… in dml21_find_dc_pipes_for_plane()430 …for (dml_stream_index = 0; dml_stream_index < dml_ctx->v21.mode_programming.programming->display_c… in dml21_handle_phantom_streams_planes()432 …if (dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_index].phantom_stream… in dml21_handle_phantom_streams_planes()447 &dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_index]); in dml21_handle_phantom_streams_planes()453 …for (dml_plane_index = 0; dml_plane_index < dml_ctx->v21.mode_programming.programming->display_con… in dml21_handle_phantom_streams_planes()454 …if (dml_ctx->v21.mode_programming.programming->plane_programming[dml_plane_index].plane_descriptor… in dml21_handle_phantom_streams_planes()465 &dml_ctx->v21.mode_programming.programming->plane_programming[dml_plane_index]); in dml21_handle_phantom_streams_planes()488 if (dml_ctx->v21.mode_programming.programming->fams2_required) { in dml21_build_fams2_programming()512 &dml_ctx->v21.mode_programming.programming->stream_programming[dml_stream_idx].fams2_params, in dml21_build_fams2_programming()[all …]
26 out->mode_programming = &core_dcn4_mode_programming; in dml2_core_create()
151 struct dml2_build_mode_programming_in_out mode_programming; member
842 mpc_factor = ctx->v21.mode_programming.programming->plane_programming[cfg_idx].num_dpps_required; in get_target_mpc_factor()894 return ctx->v21.mode_programming.programming->stream_programming[cfg_idx].num_odms_required; in get_target_odm_factor()1069 …odm_mode_array[i] = ctx->v21.mode_programming.programming->stream_programming[i].num_odms_required; in dml2_map_dc_pipes()1070 …dpp_per_surface_array[i] = ctx->v21.mode_programming.programming->plane_programming[i].num_dpps_re… in dml2_map_dc_pipes()
329 result = dml->core_instance.mode_programming(&l->mode_programming_params); in dml2_build_mode_programming()
473 bool (*mode_programming)(struct dml2_core_mode_programming_in_out *in_out); member
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