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Searched refs:mplla (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_cx0_phy.c875 .mplla = { 0x3104, /* mplla cfg0 */
924 .mplla = { 0x3104, /* mplla cfg0 */
2327 frac_quot = pll_state->mplla[8]; in intel_c20pll_calc_port_clock()
2328 frac_rem = pll_state->mplla[9]; in intel_c20pll_calc_port_clock()
2329 frac_den = pll_state->mplla[7]; in intel_c20pll_calc_port_clock()
2430 for (i = 0; i < ARRAY_SIZE(hw_state->mplla); i++) in intel_c20pll_dump_hw_state()
2611 pll_state->mplla[i]); in intel_c20_pll_program()
2615 pll_state->mplla[i]); in intel_c20_pll_program()
3322 if (memcmp(&a->mplla, &b->mplla, sizeof(a->mplla)) != 0) in mtl_compare_hw_state_c20()
3386 I915_STATE_WARN(i915, mpll_hw_state->mplla[i] != mpll_sw_state->mplla[i], in intel_c20pll_state_verify()
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A Dintel_dpll_mgr.h256 u16 mplla[10]; member

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