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Searched refs:msm_gpu (Results 1 – 25 of 37) sorted by relevance

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/linux/drivers/gpu/drm/msm/
A Dmsm_gpu.h51 int (*hw_init)(struct msm_gpu *gpu);
56 int (*ucode_load)(struct msm_gpu *gpu);
58 int (*pm_suspend)(struct msm_gpu *gpu);
59 int (*pm_resume)(struct msm_gpu *gpu);
62 irqreturn_t (*irq)(struct msm_gpu *irq);
64 void (*recover)(struct msm_gpu *gpu);
65 void (*destroy)(struct msm_gpu *gpu);
84 (struct msm_gpu *gpu);
166 struct msm_gpu { struct
631 struct msm_gpu *gpu, int sysprof);
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A Dmsm_gpu.c25 static int enable_pwrrail(struct msm_gpu *gpu) in enable_pwrrail()
58 static int enable_clk(struct msm_gpu *gpu) in enable_clk()
88 static int enable_axi(struct msm_gpu *gpu) in enable_axi()
99 int msm_gpu_pm_resume(struct msm_gpu *gpu) in msm_gpu_pm_resume()
159 int msm_gpu_hw_init(struct msm_gpu *gpu) in msm_gpu_hw_init()
181 struct msm_gpu *gpu = data; in msm_gpu_devcoredump_read()
216 struct msm_gpu *gpu = data; in msm_gpu_devcoredump_free()
357 struct msm_gpu *gpu = container_of(work, struct msm_gpu, recover_work); in recover_worker()
455 struct msm_gpu *gpu = container_of(work, struct msm_gpu, fault_work); in fault_worker()
733 struct msm_gpu *gpu = container_of(work, struct msm_gpu, retire_work); in retire_worker()
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A Dmsm_gpu_devfreq.c22 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_target()
59 static unsigned long get_freq(struct msm_gpu *gpu) in get_freq()
80 struct msm_gpu *gpu = dev_to_gpu(dev); in msm_devfreq_get_dev_status()
133 static bool has_devfreq(struct msm_gpu *gpu) in has_devfreq()
139 void msm_devfreq_init(struct msm_gpu *gpu) in msm_devfreq_init()
211 void msm_devfreq_cleanup(struct msm_gpu *gpu) in msm_devfreq_cleanup()
222 void msm_devfreq_resume(struct msm_gpu *gpu) in msm_devfreq_resume()
239 void msm_devfreq_suspend(struct msm_gpu *gpu) in msm_devfreq_suspend()
288 void msm_devfreq_active(struct msm_gpu *gpu) in msm_devfreq_active()
339 struct msm_gpu *gpu = container_of(df, struct msm_gpu, devfreq); in msm_devfreq_idle_work()
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A Dmsm_ringbuffer.h46 struct msm_gpu *gpu;
104 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
A Dmsm_ringbuffer.c18 struct msm_gpu *gpu = submit->gpu; in msm_job_run()
59 struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id, in msm_ringbuffer_new()
A Dmsm_debugfs.c37 struct msm_gpu *gpu = priv->gpu; in msm_gpu_show()
57 struct msm_gpu *gpu = priv->gpu; in msm_gpu_release()
72 struct msm_gpu *gpu = priv->gpu; in msm_gpu_open()
A Dmsm_perf.c61 struct msm_gpu *gpu = priv->gpu; in refill_buf()
155 struct msm_gpu *gpu = priv->gpu; in perf_open()
A Dmsm_mmu.h44 struct msm_mmu *msm_iommu_gpu_new(struct device *dev, struct msm_gpu *gpu, unsigned long quirks);
/linux/drivers/gpu/drm/msm/adreno/
A Da5xx_gpu.h54 void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor);
137 int a5xx_power_init(struct msm_gpu *gpu);
138 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu);
140 static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs, in spin_usecs()
156 bool a5xx_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring);
157 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state);
159 void a5xx_preempt_init(struct msm_gpu *gpu);
160 void a5xx_preempt_hw_init(struct msm_gpu *gpu);
161 void a5xx_preempt_trigger(struct msm_gpu *gpu);
162 void a5xx_preempt_irq(struct msm_gpu *gpu);
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A Dadreno_gpu.h100 struct msm_gpu *(*init)(struct drm_device *dev);
160 struct msm_gpu base;
558 int adreno_hw_init(struct msm_gpu *gpu);
559 void adreno_recover(struct msm_gpu *gpu);
566 void adreno_dump_info(struct msm_gpu *gpu);
567 void adreno_dump(struct msm_gpu *gpu);
593 adreno_create_address_space(struct msm_gpu *gpu,
597 adreno_iommu_create_address_space(struct msm_gpu *gpu,
667 struct msm_gpu *a2xx_gpu_init(struct drm_device *dev);
668 struct msm_gpu *a3xx_gpu_init(struct drm_device *dev);
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A Da4xx_gpu.c22 static void a4xx_dump(struct msm_gpu *gpu);
23 static bool a4xx_idle(struct msm_gpu *gpu);
76 static void a4xx_enable_hwcg(struct msm_gpu *gpu) in a4xx_enable_hwcg()
156 static bool a4xx_me_init(struct msm_gpu *gpu) in a4xx_me_init()
183 static int a4xx_hw_init(struct msm_gpu *gpu) in a4xx_hw_init()
350 static void a4xx_recover(struct msm_gpu *gpu) in a4xx_recover()
371 static void a4xx_destroy(struct msm_gpu *gpu) in a4xx_destroy()
385 static bool a4xx_idle(struct msm_gpu *gpu) in a4xx_idle()
402 static irqreturn_t a4xx_irq(struct msm_gpu *gpu) in a4xx_irq()
565 static void a4xx_dump(struct msm_gpu *gpu) in a4xx_dump()
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A Da2xx_gpu.c10 static void a2xx_dump(struct msm_gpu *gpu);
11 static bool a2xx_idle(struct msm_gpu *gpu);
54 static bool a2xx_me_init(struct msm_gpu *gpu) in a2xx_me_init()
108 static int a2xx_hw_init(struct msm_gpu *gpu) in a2xx_hw_init()
266 static void a2xx_recover(struct msm_gpu *gpu) in a2xx_recover()
287 static void a2xx_destroy(struct msm_gpu *gpu) in a2xx_destroy()
299 static bool a2xx_idle(struct msm_gpu *gpu) in a2xx_idle()
317 static irqreturn_t a2xx_irq(struct msm_gpu *gpu) in a2xx_irq()
448 static void a2xx_dump(struct msm_gpu *gpu) in a2xx_dump()
516 struct msm_gpu *a2xx_gpu_init(struct drm_device *dev) in a2xx_gpu_init()
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A Da5xx_debugfs.c14 static void pfp_print(struct msm_gpu *gpu, struct drm_printer *p) in pfp_print()
27 static void me_print(struct msm_gpu *gpu, struct drm_printer *p) in me_print()
40 static void meq_print(struct msm_gpu *gpu, struct drm_printer *p) in meq_print()
53 static void roq_print(struct msm_gpu *gpu, struct drm_printer *p) in roq_print()
76 void (*show)(struct msm_gpu *gpu, struct drm_printer *p) = in show()
97 struct msm_gpu *gpu = priv->gpu; in reset_set()
144 void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) in a5xx_debugfs_init()
A Da5xx_gpu.c17 static void a5xx_dump(struct msm_gpu *gpu);
475 static int a5xx_me_init(struct msm_gpu *gpu) in a5xx_me_init()
580 static int a5xx_ucode_load(struct msm_gpu *gpu) in a5xx_ucode_load()
693 static int a5xx_hw_init(struct msm_gpu *gpu) in a5xx_hw_init()
1013 static void a5xx_recover(struct msm_gpu *gpu) in a5xx_recover()
1033 static void a5xx_destroy(struct msm_gpu *gpu) in a5xx_destroy()
1108 struct msm_gpu *gpu = arg; in a5xx_fault_handler()
1344 static void a5xx_dump(struct msm_gpu *gpu) in a5xx_dump()
1351 static int a5xx_pm_resume(struct msm_gpu *gpu) in a5xx_pm_resume()
1397 static int a5xx_pm_suspend(struct msm_gpu *gpu) in a5xx_pm_suspend()
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A Dadreno_device.c58 struct msm_gpu *adreno_load_gpu(struct drm_device *dev) in adreno_load_gpu()
62 struct msm_gpu *gpu = NULL; in adreno_load_gpu()
183 struct msm_gpu *gpu; in adreno_bind()
226 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_unbind()
295 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_resume()
302 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_runtime_suspend()
314 static void suspend_scheduler(struct msm_gpu *gpu) in suspend_scheduler()
336 static void resume_scheduler(struct msm_gpu *gpu) in resume_scheduler()
349 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_suspend()
376 struct msm_gpu *gpu = dev_to_gpu(dev); in adreno_system_resume()
A Da3xx_gpu.c28 static void a3xx_dump(struct msm_gpu *gpu);
29 static bool a3xx_idle(struct msm_gpu *gpu);
85 static bool a3xx_me_init(struct msm_gpu *gpu) in a3xx_me_init()
112 static int a3xx_hw_init(struct msm_gpu *gpu) in a3xx_hw_init()
366 static void a3xx_recover(struct msm_gpu *gpu) in a3xx_recover()
387 static void a3xx_destroy(struct msm_gpu *gpu) in a3xx_destroy()
401 static bool a3xx_idle(struct msm_gpu *gpu) in a3xx_idle()
419 static irqreturn_t a3xx_irq(struct msm_gpu *gpu) in a3xx_irq()
474 static void a3xx_dump(struct msm_gpu *gpu) in a3xx_dump()
541 struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) in a3xx_gpu_init()
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A Da6xx_gpu.h111 void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp,
113 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu);
115 void a6xx_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
118 struct msm_gpu_state *a6xx_gpu_state_get(struct msm_gpu *gpu);
122 void a6xx_gpu_sw_reset(struct msm_gpu *gpu, bool assert);
A Da5xx_preempt.c40 static inline void update_wptr(struct msm_gpu *gpu, struct msm_ringbuffer *ring) in update_wptr()
56 static struct msm_ringbuffer *get_next_ring(struct msm_gpu *gpu) in get_next_ring()
83 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer()
94 void a5xx_preempt_trigger(struct msm_gpu *gpu) in a5xx_preempt_trigger()
174 void a5xx_preempt_irq(struct msm_gpu *gpu) in a5xx_preempt_irq()
216 void a5xx_preempt_hw_init(struct msm_gpu *gpu) in a5xx_preempt_hw_init()
249 struct msm_gpu *gpu = &adreno_gpu->base; in preempt_init_ring()
291 void a5xx_preempt_fini(struct msm_gpu *gpu) in a5xx_preempt_fini()
303 void a5xx_preempt_init(struct msm_gpu *gpu) in a5xx_preempt_init()
A Da6xx_gpu.c612 static int a6xx_cp_init(struct msm_gpu *gpu) in a6xx_cp_init()
641 static int a7xx_cp_init(struct msm_gpu *gpu) in a7xx_cp_init()
698 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_ucode_check_version()
861 static int hw_init(struct msm_gpu *gpu) in hw_init()
1217 static void a6xx_dump(struct msm_gpu *gpu) in a6xx_dump()
1417 struct msm_gpu *gpu = arg; in a6xx_fault_handler()
1582 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_llc_activate()
1642 struct msm_gpu *gpu = &adreno_gpu->base; in a7xx_llc_activate()
1711 struct msm_gpu *gpu = &adreno_gpu->base; in a7xx_cx_mem_init()
1766 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_bus_clear_pending_transactions()
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A Dadreno_gpu.c176 int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid) in adreno_zap_shader_load()
195 adreno_create_address_space(struct msm_gpu *gpu, in adreno_create_address_space()
202 adreno_iommu_create_address_space(struct msm_gpu *gpu, in adreno_iommu_create_address_space()
573 int adreno_hw_init(struct msm_gpu *gpu) in adreno_hw_init()
604 struct msm_gpu *gpu = &adreno_gpu->base; in get_rptr()
614 void adreno_recover(struct msm_gpu *gpu) in adreno_recover()
923 void adreno_dump_info(struct msm_gpu *gpu) in adreno_dump_info()
945 void adreno_dump(struct msm_gpu *gpu) in adreno_dump()
986 struct msm_gpu *gpu) in adreno_get_pwrlevels()
1080 struct msm_gpu *gpu = &adreno_gpu->base; in adreno_gpu_init()
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A Da5xx_power.c103 static inline uint32_t _get_mvolts(struct msm_gpu *gpu, uint32_t freq) in _get_mvolts()
122 static void a530_lm_setup(struct msm_gpu *gpu) in a530_lm_setup()
175 static void a540_lm_setup(struct msm_gpu *gpu) in a540_lm_setup()
211 static void a5xx_pc_init(struct msm_gpu *gpu) in a5xx_pc_init()
220 static int a5xx_gpmu_init(struct msm_gpu *gpu) in a5xx_gpmu_init()
278 static void a5xx_lm_enable(struct msm_gpu *gpu) in a5xx_lm_enable()
295 int a5xx_power_init(struct msm_gpu *gpu) in a5xx_power_init()
324 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu) in a5xx_gpmu_ucode_init()
A Da6xx_gpu_state.c131 static int a6xx_crashdumper_init(struct msm_gpu *gpu, in a6xx_crashdumper_init()
144 static int a6xx_crashdumper_run(struct msm_gpu *gpu, in a6xx_crashdumper_run()
430 static void a6xx_get_debugbus(struct msm_gpu *gpu, in a6xx_get_debugbus()
691 static void a6xx_get_cluster(struct msm_gpu *gpu, in a6xx_get_cluster()
751 static void a7xx_get_cluster(struct msm_gpu *gpu, in a7xx_get_cluster()
796 static void a6xx_get_clusters(struct msm_gpu *gpu, in a6xx_get_clusters()
815 static void a7xx_get_clusters(struct msm_gpu *gpu, in a7xx_get_clusters()
934 static void a6xx_get_shaders(struct msm_gpu *gpu, in a6xx_get_shaders()
953 static void a7xx_get_shaders(struct msm_gpu *gpu, in a7xx_get_shaders()
1284 static void a6xx_get_registers(struct msm_gpu *gpu, in a6xx_get_registers()
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A Da2xx_gpummu.c16 struct msm_gpu *gpu;
96 struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu) in a2xx_gpummu_new()
A Da2xx_gpu.h22 struct msm_mmu *a2xx_gpummu_new(struct device *dev, struct msm_gpu *gpu);
A Da6xx_gmu.c24 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_fault()
108 void a6xx_gmu_set_freq(struct msm_gpu *gpu, struct dev_pm_opp *opp, in a6xx_gmu_set_freq()
169 unsigned long a6xx_gmu_get_freq(struct msm_gpu *gpu) in a6xx_gmu_get_freq()
947 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_force_off()
985 static void a6xx_gmu_set_initial_freq(struct msm_gpu *gpu, struct a6xx_gmu *gmu) in a6xx_gmu_set_initial_freq()
999 static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu) in a6xx_gmu_set_initial_bw()
1015 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_resume()
1187 struct msm_gpu *gpu = &a6xx_gpu->base.base; in a6xx_gmu_stop()
1399 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_rpmh_votes_init()
1449 struct msm_gpu *gpu = &adreno_gpu->base; in a6xx_gmu_pwrlevels_probe()

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