Home
last modified time | relevance | path

Searched refs:nand (Results 1 – 25 of 754) sorted by relevance

12345678910>>...31

/linux/drivers/mtd/nand/
A Dcore.c35 if (nand->ops->isbad(nand, pos)) in nanddev_isbad()
50 return nand->ops->isbad(nand, pos); in nanddev_isbad()
73 ret = nand->ops->markbad(nand, pos); in nanddev_markbad()
131 if (nanddev_isbad(nand, pos) || nanddev_isreserved(nand, pos)) { in nanddev_erase()
137 return nand->ops->erase(nand, pos); in nanddev_erase()
231 nand->ecc.engine = nand_ecc_get_sw_engine(nand); in nanddev_get_ecc_engine()
234 nand->ecc.engine = nand_ecc_get_on_die_hw_engine(nand); in nanddev_get_ecc_engine()
237 nand->ecc.engine = nand_ecc_get_on_host_hw_engine(nand); in nanddev_get_ecc_engine()
288 nand->mtd.name); in nanddev_find_ecc_configuration()
357 if (!nand || !ops) in nanddev_init()
[all …]
A Decc.c114 if (!nand->ecc.engine || !nand->ecc.engine->ops->init_ctx) in nand_ecc_init_ctx()
117 return nand->ecc.engine->ops->init_ctx(nand); in nand_ecc_init_ctx()
127 if (nand->ecc.engine && nand->ecc.engine->ops->cleanup_ctx) in nand_ecc_cleanup_ctx()
128 nand->ecc.engine->ops->cleanup_ctx(nand); in nand_ecc_cleanup_ctx()
140 if (!nand->ecc.engine || !nand->ecc.engine->ops->prepare_io_req) in nand_ecc_prepare_io_req()
143 return nand->ecc.engine->ops->prepare_io_req(nand, req); in nand_ecc_prepare_io_req()
155 if (!nand->ecc.engine || !nand->ecc.engine->ops->finish_io_req) in nand_ecc_finish_io_req()
158 return nand->ecc.engine->ops->finish_io_req(nand, req); in nand_ecc_finish_io_req()
495 ctx->nand = nand; in nand_ecc_init_req_tweaking()
528 struct nand_device *nand = ctx->nand; in nand_ecc_tweak_req() local
[all …]
A Decc-sw-bch.c165 nand_ecc_sw_bch_cleanup(nand); in nand_ecc_sw_bch_init()
246 nand->ecc.ctx.priv = engine_conf; in nand_ecc_sw_bch_init_ctx()
247 nand->ecc.ctx.nsteps = nsteps; in nand_ecc_sw_bch_init_ctx()
248 nand->ecc.ctx.total = nsteps * code_size; in nand_ecc_sw_bch_init_ctx()
250 ret = nand_ecc_sw_bch_init(nand); in nand_ecc_sw_bch_init_ctx()
265 nand_ecc_sw_bch_cleanup(nand); in nand_ecc_sw_bch_init_ctx()
282 nand_ecc_sw_bch_cleanup(nand); in nand_ecc_sw_bch_cleanup_ctx()
298 int eccsteps = nand->ecc.ctx.nsteps; in nand_ecc_sw_bch_prepare_io_req()
299 int total = nand->ecc.ctx.total; in nand_ecc_sw_bch_prepare_io_req()
334 int total = nand->ecc.ctx.total; in nand_ecc_sw_bch_finish_io_req()
[all …]
A Dbbt.c23 int nanddev_bbt_init(struct nand_device *nand) in nanddev_bbt_init() argument
26 unsigned int nblocks = nanddev_neraseblocks(nand); in nanddev_bbt_init()
29 if (!nand->bbt.cache) in nanddev_bbt_init()
42 void nanddev_bbt_cleanup(struct nand_device *nand) in nanddev_bbt_cleanup() argument
44 bitmap_free(nand->bbt.cache); in nanddev_bbt_cleanup()
57 int nanddev_bbt_update(struct nand_device *nand) in nanddev_bbt_update() argument
71 int nanddev_bbt_get_block_status(const struct nand_device *nand, in nanddev_bbt_get_block_status() argument
75 unsigned long *pos = nand->bbt.cache + in nanddev_bbt_get_block_status()
80 if (entry >= nanddev_neraseblocks(nand)) in nanddev_bbt_get_block_status()
108 unsigned long *pos = nand->bbt.cache + in nanddev_bbt_set_block_status()
[all …]
A Decc-sw-hamming.c471 struct mtd_info *mtd = nanddev_to_mtd(nand); in nand_ecc_sw_hamming_init_ctx()
515 nand->ecc.ctx.priv = engine_conf; in nand_ecc_sw_hamming_init_ctx()
517 nand->ecc.ctx.total = nand->ecc.ctx.nsteps * engine_conf->code_size; in nand_ecc_sw_hamming_init_ctx()
549 struct mtd_info *mtd = nanddev_to_mtd(nand); in nand_ecc_sw_hamming_prepare_io_req()
550 int eccsize = nand->ecc.ctx.conf.step_size; in nand_ecc_sw_hamming_prepare_io_req()
552 int eccsteps = nand->ecc.ctx.nsteps; in nand_ecc_sw_hamming_prepare_io_req()
553 int total = nand->ecc.ctx.total; in nand_ecc_sw_hamming_prepare_io_req()
586 struct mtd_info *mtd = nanddev_to_mtd(nand); in nand_ecc_sw_hamming_finish_io_req()
587 int eccsize = nand->ecc.ctx.conf.step_size; in nand_ecc_sw_hamming_finish_io_req()
588 int total = nand->ecc.ctx.total; in nand_ecc_sw_hamming_finish_io_req()
[all …]
/linux/include/linux/mtd/
A Dnand.h365 struct nand_device *nand; member
466 return &nand->mtd; in nanddev_to_mtd()
537 return nand->memorg.pagesize * nand->memorg.pages_per_eraseblock; in nanddev_eraseblock_size()
561 return nand->memorg.eraseblocks_per_lun * nand->memorg.luns_per_target; in nanddev_eraseblocks_per_target()
597 return nand->memorg.ntargets * nand->memorg.luns_per_target * in nanddev_neraseblocks()
609 return nanddev_target_size(nand) * nanddev_ntargets(nand); in nanddev_size()
624 return &nand->memorg; in nanddev_get_memorg()
634 return &nand->ecc.ctx.conf; in nanddev_get_ecc_conf()
654 return nand->ecc.ctx.total / nand->ecc.ctx.nsteps; in nanddev_get_ecc_bytes_per_step()
1084 return nand->ecc.ctx.priv; in nand_to_ecc_ctx()
[all …]
/linux/drivers/mtd/nand/raw/
A Dmeson_nand.c124 struct nand_chip nand; member
260 return container_of(nand, struct meson_nfc_nand_chip, nand); in to_meson_nand()
398 len = nand->ecc.size * (i + 1) + (nand->ecc.bytes + 2) * i; in meson_nfc_oob_ptr()
408 temp = nand->ecc.size + nand->ecc.bytes; in meson_nfc_data_ptr()
757 meson_nfc_select_chip(nand, nand->cur_cs); in meson_nfc_write_page_sub()
836 meson_nfc_select_chip(nand, nand->cur_cs); in meson_nfc_read_page_sub()
1294 if (nand->ecc.strength > 60 || nand->ecc.strength < 8) in meson_nand_bch_mode()
1422 nand = &meson_chip->nand; in meson_nfc_nand_chip_init()
1452 nand_cleanup(nand); in meson_nfc_nand_chip_init()
1461 nand_cleanup(nand); in meson_nfc_nand_chip_init()
[all …]
A Dsunxi_nand.c205 return container_of(nand, struct sunxi_nand_chip, nand); in to_sunxi_nand()
1100 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_read_page()
1136 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_read_page_dma()
1158 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_read_subpage()
1192 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_read_subpage_dma()
1213 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_write_page()
1250 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_write_subpage()
1286 sunxi_nfc_select_chip(nand, nand->cur_cs); in sunxi_nfc_hw_ecc_write_page_dma()
1350 return nand->ecc.read_page(nand, buf, 1, page); in sunxi_nfc_hw_ecc_read_oob()
1360 ret = nand->ecc.write_page(nand, buf, 1, page); in sunxi_nfc_hw_ecc_write_oob()
[all …]
A DMakefile3 obj-$(CONFIG_MTD_RAW_NAND) += nand.o
63 nand-objs += nand_onfi.o
64 nand-objs += nand_jedec.o
65 nand-objs += nand_amd.o
66 nand-objs += nand_esmt.o
67 nand-objs += nand_hynix.o
68 nand-objs += nand_macronix.o
69 nand-objs += nand_micron.o
70 nand-objs += nand_sandisk.o
71 nand-objs += nand_samsung.o
[all …]
/linux/Documentation/devicetree/bindings/mtd/
A Dmarvell,nand-controller.yaml60 "^nand@[a-f0-9]$":
62 $ref: raw-nand-chip.yaml
69 nand-rb:
74 nand-ecc-step-size:
77 nand-ecc-strength:
80 nand-ecc-mode:
101 - nand-rb
162 nand@0 {
165 nand-rb = <0>;
198 nand@0 {
[all …]
A Ddenali,nand.yaml15 - altr,socfpga-denali-nand
42 - const: nand
57 - const: nand
59 - const: nand
67 "^nand@[a-f0-9]$":
69 $ref: raw-nand-chip.yaml
73 - $ref: nand-controller.yaml
82 "^nand@[a-f0-9]$":
99 "^nand@[a-f0-9]$":
117 "^nand@[a-f0-9]$":
[all …]
A Dsamsung-s3c2410.txt5 "samsung,s3c2410-nand"
6 "samsung,s3c2412-nand"
7 "samsung,s3c2440-nand"
11 - clock-names : must contain "nand"
17 - nand-ecc-mode : see nand-controller.yaml
18 - nand-on-flash-bbt : see nand-controller.yaml
26 nand-controller@4e000000 {
34 clock-names = "nand";
36 nand {
37 nand-ecc-mode = "soft";
[all …]
A Dqcom,nandc.yaml15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
47 "^nand@[a-f0-9]$":
52 nand-bus-width:
55 nand-ecc-strength:
58 nand-ecc-step-size:
157 nand@0 {
[all …]
A Dnvidia-tegra20-nand.txt5 - "nvidia,tegra20-nand"
11 - nand
15 - nand
29 - nand-bus-width : See nand-controller.yaml
30 - nand-on-flash-bbt: See nand-controller.yaml
36 - nand-ecc-maximize: See nand-controller.yaml
50 clock-names = "nand";
52 reset-names = "nand";
54 nand@0 {
58 nand-bus-width = <8>;
[all …]
A Dbrcm,brcmnand.yaml85 enum: [ nand, flash-dma, flash-edu, nand-cache, nand-int-base, iproc-idm, iproc-ext ]
106 const: nand
108 brcm,nand-has-wp:
124 "^nand@[a-f0-9]$":
131 nand-ecc-step-size:
171 - const: nand
182 - const: nand
242 nand@1 {
255 compatible = "brcm,nand-bcm63168", "brcm,nand-bcm6368",
260 reg-names = "nand", "nand-int-base", "nand-cache";
[all …]
A Dmediatek,mtk-nfc.yaml42 "^nand@[a-f0-9]$":
43 $ref: raw-nand-chip.yaml#
48 nand-ecc-mode:
52 - $ref: nand-controller.yaml#
61 "^nand@[a-f0-9]$":
63 nand-ecc-step-size:
65 nand-ecc-strength:
76 "^nand@[a-f0-9]$":
80 nand-ecc-strength:
91 "^nand@[a-f0-9]$":
[all …]
A Dvf610-nfc.txt28 - nand-bus-width: see nand-controller.yaml
29 - nand-ecc-mode: see nand-controller.yaml
32 - nand-ecc-strength: supported strengths are 24 and 32 bit (see nand-controller.yaml)
35 - nand-on-flash-bbt: see nand-controller.yaml
39 nfc: nand@400e0000 {
50 nand@0 {
53 nand-bus-width = <8>;
54 nand-ecc-mode = "hw";
55 nand-ecc-strength = <32>;
56 nand-ecc-step-size = <2048>;
[all …]
A Dhisi504-nand.txt10 - nand-bus-width: See nand-controller.yaml.
11 - nand-ecc-mode: Support none and hw ecc mode.
17 - nand-ecc-strength: Number of bits to correct per ECC step.
18 - nand-ecc-step-size: Number of data bytes covered by a single ECC step.
22 - nand-ecc-strength = <16>, nand-ecc-step-size = <1024>
29 nand: nand@4020000 {
33 nand-bus-width = <8>;
34 nand-ecc-mode = "hw";
35 nand-ecc-strength = <16>;
36 nand-ecc-step-size = <1024>;
A Dtechnologic,nand.yaml4 $id: http://devicetree.org/schemas/mtd/technologic,nand.yaml#
13 - $ref: nand-controller.yaml
18 - const: technologic,ts7200-nand
21 - technologic,ts7300-nand
22 - technologic,ts7260-nand
23 - technologic,ts7250-nand
24 - const: technologic,ts7200-nand
37 nand-controller@60000000 {
38 compatible = "technologic,ts7200-nand";
42 nand@0 {
A Damlogic,meson-nand.yaml10 - $ref: nand-controller.yaml
41 "^nand@[0-7]$":
43 $ref: raw-nand-chip.yaml
49 nand-ecc-mode:
52 nand-ecc-step-size:
55 nand-ecc-strength:
62 nand-rb:
86 nand-ecc-strength: [nand-ecc-step-size]
87 nand-ecc-step-size: [nand-ecc-strength]
119 nand@0 {
[all …]
A Drockchip,nand-controller.yaml10 - $ref: nand-controller.yaml#
58 "^nand@[0-7]$":
60 $ref: raw-nand-chip.yaml
66 nand-ecc-mode:
69 nand-ecc-step-size:
72 nand-ecc-strength:
88 nand-bus-width:
152 nand@0 {
154 label = "rk-nand";
155 nand-bus-width = <8>;
[all …]
A Dgpmi-nand.yaml22 - fsl,imx23-gpmi-nand
23 - fsl,imx28-gpmi-nand
24 - fsl,imx6q-gpmi-nand
25 - fsl,imx6sx-gpmi-nand
26 - fsl,imx7d-gpmi-nand
27 - fsl,imx8qxp-gpmi-nand
30 - fsl,imx8mm-gpmi-nand
31 - fsl,imx8mn-gpmi-nand
41 - const: gpmi-nand
97 - $ref: nand-controller.yaml
[all …]
/linux/drivers/mtd/nand/spi/
A Dcore.c171 nand->memorg.ntargets, in spinand_init_cfg_cache()
269 nand->ecc.ctx.conf.step_size = nand->ecc.requirements.step_size; in spinand_ondie_ecc_init_ctx()
270 nand->ecc.ctx.conf.strength = nand->ecc.requirements.strength; in spinand_ondie_ecc_init_ctx()
288 kfree(nand->ecc.ctx.priv); in spinand_ondie_ecc_cleanup_ctx()
472 nbytes = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand); in spinand_write_to_cache_op()
1209 nanddev_page_size(nand); in spinand_select_op_variant()
1323 nanddev_size(nand) >> 20, nanddev_eraseblock_size(nand) >> 10, in spinand_detect()
1324 nanddev_page_size(nand), nanddev_per_page_oobsize(nand)); in spinand_detect()
1457 if (nand->ecc.engine) { in spinand_init()
1484 nanddev_cleanup(nand); in spinand_init()
[all …]
A Desmt.c57 #define ESMT_OOB_SECTION_SIZE(nand) \ argument
58 (nanddev_per_page_oobsize(nand) / ESMT_OOB_SECTION_COUNT)
59 #define ESMT_OOB_FREE_SIZE(nand) \ argument
60 (ESMT_OOB_SECTION_SIZE(nand) / 2)
61 #define ESMT_OOB_ECC_SIZE(nand) \ argument
62 (ESMT_OOB_SECTION_SIZE(nand) - ESMT_OOB_FREE_SIZE(nand))
68 struct nand_device *nand = mtd_to_nanddev(mtd); in f50l1g41lb_ooblayout_ecc() local
73 region->offset = section * ESMT_OOB_SECTION_SIZE(nand) + in f50l1g41lb_ooblayout_ecc()
74 ESMT_OOB_FREE_SIZE(nand); in f50l1g41lb_ooblayout_ecc()
75 region->length = ESMT_OOB_ECC_SIZE(nand); in f50l1g41lb_ooblayout_ecc()
[all …]
/linux/drivers/mtd/nand/raw/atmel/
A Dnand-controller.c524 return nand_gpio_waitrdy(&nand->base, nand->activecs->rb.gpio, in atmel_nand_waitrdy()
547 nand->activecs = &nand->cs[cs]; in atmel_nand_select_target()
559 nand->activecs = &nand->cs[cs]; in atmel_hsmc_nand_select_target()
1597 BIT(nand->cs[i].id), BIT(nand->cs[i].id)); in atmel_smc_nand_init()
1638 if (!nand) in atmel_nand_create()
1722 return nand; in atmel_nand_create()
1734 if (nand->cdgpio && gpiod_get_value(nand->cdgpio)) { in atmel_nand_controller_add_nand()
1787 nand = devm_kzalloc(nc->dev, sizeof(*nand) + sizeof(*nand->cs), in atmel_nand_controller_legacy_add_nands()
1789 if (!nand) in atmel_nand_controller_legacy_add_nands()
1792 nand->numcs = 1; in atmel_nand_controller_legacy_add_nands()
[all …]

Completed in 67 milliseconds

12345678910>>...31