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Searched refs:num_mec (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
A Dgfx_v9_4_3.c1040 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_alloc_ip_dump()
1076 adev->gfx.mec.num_mec = 2; in gfx_v9_4_3_sw_init()
1123 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v9_4_3_sw_init()
3165 for (j = 0; j < adev->gfx.mec.num_mec; j++) { in gfx_v9_4_3_set_priv_reg_fault_state()
3205 for (j = 0; j < adev->gfx.mec.num_mec; j++) { in gfx_v9_4_3_set_bad_op_fault_state()
4612 num_inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_ip_print()
4618 adev->gfx.mec.num_mec, in gfx_v9_4_3_ip_print()
4625 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v9_4_3_ip_print()
4673 num_inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_ip_dump()
4681 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v9_4_3_ip_dump()
A Damdgpu_gfx.h107 u32 num_mec; member
A Dgfx_v12_0.c1297 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v12_0_alloc_ip_dump()
1335 adev->gfx.mec.num_mec = 2; in gfx_v12_0_sw_init()
1343 adev->gfx.mec.num_mec = 1; in gfx_v12_0_sw_init()
1417 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v12_0_sw_init()
4839 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v12_0_set_priv_reg_fault_state()
4885 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v12_0_set_bad_op_fault_state()
5061 adev->gfx.mec.num_mec, in gfx_v12_ip_print()
5065 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v12_ip_print()
5126 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v12_ip_dump()
A Dgfx_v11_0.c1514 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v11_0_alloc_ip_dump()
1552 adev->gfx.mec.num_mec = 2; in gfx_v11_0_sw_init()
1564 adev->gfx.mec.num_mec = 1; in gfx_v11_0_sw_init()
1572 adev->gfx.mec.num_mec = 1; in gfx_v11_0_sw_init()
1652 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v11_0_sw_init()
4794 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v11_0_soft_reset()
6311 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v11_0_set_priv_reg_fault_state()
6357 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v11_0_set_bad_op_fault_state()
6662 adev->gfx.mec.num_mec, in gfx_v11_ip_print()
6666 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v11_ip_print()
[all …]
A Dgfx_v9_0.c2189 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_0_alloc_ip_dump()
2218 adev->gfx.mec.num_mec = 2; in gfx_v9_0_sw_init()
2221 adev->gfx.mec.num_mec = 1; in gfx_v9_0_sw_init()
2347 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v9_0_sw_init()
6048 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v9_0_set_priv_reg_fault_state()
6084 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v9_0_set_bad_op_fault_state()
7339 adev->gfx.mec.num_mec, in gfx_v9_ip_print()
7343 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v9_ip_print()
7380 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v9_ip_dump()
A Dgfx_v7_0.c2736 mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec in gfx_v7_0_mec_init()
3010 for (i = 0; i < adev->gfx.mec.num_mec; i++) in gfx_v7_0_cp_compute_resume()
4354 adev->gfx.mec.num_mec = 2; in gfx_v7_0_sw_init()
4361 adev->gfx.mec.num_mec = 1; in gfx_v7_0_sw_init()
4417 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v7_0_sw_init()
A Damdgpu_gfx.c173 return adev->gfx.mec.num_mec > 1; in amdgpu_gfx_is_compute_multipipe_capable()
281 queue_bit = adev->gfx.mec.num_mec in amdgpu_gfx_kiq_acquire()
A Dgfx_v10_0.c4661 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v10_0_alloc_ip_dump()
4701 adev->gfx.mec.num_mec = 2; in gfx_v10_0_sw_init()
4716 adev->gfx.mec.num_mec = 2; in gfx_v10_0_sw_init()
4724 adev->gfx.mec.num_mec = 1; in gfx_v10_0_sw_init()
4801 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v10_0_sw_init()
9158 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v10_0_set_priv_reg_fault_state()
9204 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v10_0_set_bad_op_fault_state()
9591 adev->gfx.mec.num_mec, in gfx_v10_ip_print()
9595 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v10_ip_print()
9656 for (i = 0; i < adev->gfx.mec.num_mec; i++) { in gfx_v10_ip_dump()
A Dgfx_v8_0.c1912 adev->gfx.mec.num_mec = 2; in gfx_v8_0_sw_init()
1917 adev->gfx.mec.num_mec = 1; in gfx_v8_0_sw_init()
1998 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v8_0_sw_init()
/linux/drivers/gpu/drm/radeon/
A Dcik.c4386 rdev->mec.num_mec = 2; in cik_mec_init()
4388 rdev->mec.num_mec = 1; in cik_mec_init()
4390 rdev->mec.num_queue = rdev->mec.num_mec * rdev->mec.num_pipe * 8; in cik_mec_init()
4394 rdev->mec.num_mec *rdev->mec.num_pipe * MEC_HPD_SIZE * 2, in cik_mec_init()
4424 memset(hpd, 0, rdev->mec.num_mec *rdev->mec.num_pipe * MEC_HPD_SIZE * 2); in cik_mec_init()
4532 for (i = 0; i < (rdev->mec.num_pipe * rdev->mec.num_mec); ++i) { in cik_cp_compute_resume()
A Dradeon.h828 u32 num_mec; member

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