| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_amdkfd_gfx_v10_3.c | 60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
115 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v10_3()
116 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v10_3()
197 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v10_3()
198 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hqd_load_v10_3()
289 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v10_3()
290 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hiq_mqd_load_v10_3()
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| A D | amdgpu_amdkfd_gfx_v12.c | 46 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
47 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
62 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v12()
63 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v12()
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| A D | amdgpu_amdkfd_gfx_v8.c | 60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
118 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
119 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
172 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hqd_load()
173 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_hqd_load()
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| A D | amdgpu_amdkfd_gfx_v11.c | 58 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
59 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
111 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in init_interrupts_v11()
112 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in init_interrupts_v11()
182 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hqd_load_v11()
183 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hqd_load_v11()
274 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in hiq_mqd_load_v11()
275 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in hiq_mqd_load_v11()
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| A D | amdgpu_amdkfd_gfx_v7.c | 66 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
67 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
123 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
124 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
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| A D | amdgpu_amdkfd_gfx_v10.c | 60 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
61 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
146 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
147 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
303 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_hiq_mqd_load()
304 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_hiq_mqd_load()
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| A D | amdgpu_amdkfd_gfx_v9.c | 66 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_acquire_queue()
67 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_acquire_queue()
166 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_init_interrupts()
167 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_init_interrupts()
314 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_hiq_mqd_load()
315 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_hiq_mqd_load()
1044 max_queue_cnt = adev->gfx.mec.num_pipe_per_mec * in kgd_gfx_v9_get_cu_occupancy()
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| A D | amdgpu_amdkfd.c | 180 .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec, in amdgpu_amdkfd_device_init()
201 * adev->gfx.mec.num_pipe_per_mec in amdgpu_amdkfd_device_init()
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| A D | amdgpu_gfx.c | 51 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
64 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
66 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
215 int max_queues_per_mec = min(adev->gfx.mec.num_pipe_per_mec * in amdgpu_gfx_compute_queue_acquire()
225 pipe = i % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_compute_queue_acquire()
226 queue = (i / adev->gfx.mec.num_pipe_per_mec) % in amdgpu_gfx_compute_queue_acquire()
282 * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_kiq_acquire()
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| A D | gfx_v12_0.c | 948 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v12_0_compute_ring_init()
1336 adev->gfx.mec.num_pipe_per_mec = 2; in gfx_v12_0_sw_init()
1344 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v12_0_sw_init()
1350 num_compute_rings = (adev->gfx.mec.num_pipe_per_mec * in gfx_v12_0_sw_init()
1419 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v12_0_sw_init()
2714 adev->gfx.mec.num_pipe_per_mec, in gfx_v12_0_cp_compute_load_microcode_rs64()
2726 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v12_0_cp_compute_load_microcode_rs64()
2747 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v12_0_cp_compute_load_microcode_rs64()
5062 adev->gfx.mec.num_pipe_per_mec, in gfx_v12_ip_print()
5066 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v12_ip_print()
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| A D | gfx_v9_4_3.c | 1014 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v9_4_3_compute_ring_init()
1040 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_alloc_ip_dump()
1077 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_4_3_sw_init()
1125 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; in gfx_v9_4_3_sw_init()
3166 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v9_4_3_set_priv_reg_fault_state()
3206 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v9_4_3_set_bad_op_fault_state()
3469 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v9_4_3_emit_wave_limit()
4612 num_inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_4_3_ip_print()
4619 adev->gfx.mec.num_pipe_per_mec, in gfx_v9_4_3_ip_print()
4626 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_4_3_ip_print()
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| A D | gfx_v11_0.c | 1148 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v11_0_compute_ring_init()
1553 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1565 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1573 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v11_0_sw_init()
1654 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v11_0_sw_init()
2703 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v11_0_config_mec_cache_rs64()
3796 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v11_0_cp_compute_load_microcode_rs64()
4796 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v11_0_soft_reset()
6663 adev->gfx.mec.num_pipe_per_mec, in gfx_v11_ip_print()
6667 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v11_ip_print()
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| A D | amdgpu_gfx.h | 108 u32 num_pipe_per_mec; member
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| A D | gfx_v7_0.c | 2736 mec_hpd_size = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec in gfx_v7_0_mec_init()
2765 size_t eop_offset = (mec * adev->gfx.mec.num_pipe_per_mec + pipe) in gfx_v7_0_compute_pipe_init()
3011 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) in gfx_v7_0_cp_compute_resume()
4332 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v7_0_compute_ring_init()
4364 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v7_0_sw_init()
4419 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v7_0_sw_init()
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| A D | gfx_v9_0.c | 2164 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v9_0_compute_ring_init()
2189 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v9_0_alloc_ip_dump()
2231 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v9_0_sw_init()
2349 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v9_0_sw_init()
6049 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_0_set_priv_reg_fault_state()
6085 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_0_set_bad_op_fault_state()
7161 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v9_0_emit_wave_limit()
7340 adev->gfx.mec.num_pipe_per_mec, in gfx_v9_ip_print()
7344 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_ip_print()
7381 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v9_ip_dump()
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| A D | gfx_v10_0.c | 4636 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v10_0_compute_ring_init()
4661 inst = adev->gfx.mec.num_mec * adev->gfx.mec.num_pipe_per_mec * in gfx_v10_0_alloc_ip_dump()
4702 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4717 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4725 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4803 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v10_0_sw_init()
9159 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v10_0_set_priv_reg_fault_state()
9205 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v10_0_set_bad_op_fault_state()
9592 adev->gfx.mec.num_pipe_per_mec, in gfx_v10_ip_print()
9596 for (j = 0; j < adev->gfx.mec.num_pipe_per_mec; j++) { in gfx_v10_ip_print()
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| A D | amdgpu_mes.c | 149 if (i >= adev->gfx.mec.num_pipe_per_mec) in amdgpu_mes_init()
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| A D | gfx_v8_0.c | 1880 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v8_0_compute_ring_init()
1921 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v8_0_sw_init()
2000 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v8_0_sw_init()
6881 for (i = 0; i < adev->gfx.mec.num_pipe_per_mec; i++) { in gfx_v8_0_emit_wave_limit()
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| /linux/drivers/gpu/drm/amd/include/ |
| A D | kgd_kfd_interface.h | 111 uint32_t num_pipe_per_mec; member
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| /linux/drivers/gpu/drm/amd/amdkfd/ |
| A D | kfd_device_queue_manager.c | 82 int pipe_offset = (mec * dqm->dev->kfd->shared_resources.num_pipe_per_mec in is_pipe_enabled()
106 return dqm->dev->kfd->shared_resources.num_pipe_per_mec; in get_pipes_per_mec()
1667 / dqm->dev->kfd->shared_resources.num_pipe_per_mec; in set_sched_resources()
1834 dqm->dev->kfd->shared_resources.num_pipe_per_mec * in start_cpsch()
2129 / dqm->dev->kfd->shared_resources.num_pipe_per_mec; in detect_queue_hang()
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