| /linux/drivers/gpu/drm/imagination/ |
| A D | pvr_vm_mips.c | 172 start_pfn = (start & fw_dev->fw_heap_info.offset_mask) >> ROGUE_MIPSFW_LOG2_PAGE_SIZE_4K; in pvr_vm_mips_map()
173 end_pfn = (end & fw_dev->fw_heap_info.offset_mask) >> ROGUE_MIPSFW_LOG2_PAGE_SIZE_4K; in pvr_vm_mips_map()
228 const u32 start_pfn = (start & fw_dev->fw_heap_info.offset_mask) >> in pvr_vm_mips_unmap()
230 const u32 end_pfn = (end & fw_dev->fw_heap_info.offset_mask) >> in pvr_vm_mips_unmap()
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| A D | pvr_fw_mips.c | 226 return ((fw_obj->fw_addr_offset + offset) & pvr_dev->fw_dev.fw_heap_info.offset_mask) | in pvr_mips_get_fw_addr_with_offset()
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| A D | pvr_fw.h | 342 u32 offset_mask; member
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| A D | pvr_fw.c | 667 u32 base_addr = private_data->base_addr & pvr_dev->fw_dev.fw_heap_info.offset_mask; in pvr_fw_process()
884 fw_dev->fw_heap_info.offset_mask = fw_dev->fw_heap_info.raw_size - 1; in pvr_fw_heap_info_init()
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| /linux/drivers/iommu/amd/ |
| A D | io_pgtable_v2.c | 313 unsigned long offset_mask, pte_pgsize; in iommu_v2_iova_to_phys() local
320 offset_mask = pte_pgsize - 1; in iommu_v2_iova_to_phys()
323 return (__pte & ~offset_mask) | (iova & offset_mask); in iommu_v2_iova_to_phys()
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| A D | io_pgtable.c | 442 unsigned long offset_mask, pte_pgsize; in iommu_v1_iova_to_phys() local
450 offset_mask = pte_pgsize - 1; in iommu_v1_iova_to_phys()
453 return (__pte & ~offset_mask) | (iova & offset_mask); in iommu_v1_iova_to_phys()
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| /linux/drivers/soc/mediatek/ |
| A D | mtk-cmdq-helper.c | 200 u16 offset_mask = offset; in cmdq_pkt_write_mask() local
210 offset_mask |= CMDQ_WRITE_ENABLE_MASK; in cmdq_pkt_write_mask()
212 err = cmdq_pkt_write(pkt, subsys, offset_mask, value); in cmdq_pkt_write_mask()
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| /linux/drivers/gpu/drm/amd/display/include/ |
| A D | gpio_types.h | 80 uint32_t offset_mask; member
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn32/ |
| A D | hw_translate_dcn32.c | 319 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn401/ |
| A D | hw_translate_dcn401.c | 303 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/arch/x86/events/amd/ |
| A D | ibs.c | 91 unsigned long offset_mask[1]; member
678 .offset_mask = { MSR_AMD64_IBSFETCH_REG_MASK },
703 .offset_mask = { MSR_AMD64_IBSOP_REG_MASK },
1075 offset = find_next_bit(perf_ibs->offset_mask, in perf_ibs_handle_irq()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce110/ |
| A D | hw_translate_dce110.c | 358 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn20/ |
| A D | hw_translate_dcn20.c | 353 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn21/ |
| A D | hw_translate_dcn21.c | 343 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn30/ |
| A D | hw_translate_dcn30.c | 358 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn315/ |
| A D | hw_translate_dcn315.c | 344 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/accel/habanalabs/common/mmu/ |
| A D | mmu.c | 481 u64 offset_mask, addr_mask, hop_shift, tmp_phys_addr; in hl_mmu_pa_page_with_offset() local
525 offset_mask = (1ull << hop_shift) - 1; in hl_mmu_pa_page_with_offset()
526 addr_mask = ~(offset_mask); in hl_mmu_pa_page_with_offset()
528 (virt_addr & offset_mask); in hl_mmu_pa_page_with_offset()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce60/ |
| A D | hw_translate_dce60.c | 392 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce80/ |
| A D | hw_translate_dce80.c | 392 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dce120/ |
| A D | hw_translate_dce120.c | 380 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/gpu/drm/amd/display/dc/gpio/dcn10/ |
| A D | hw_translate_dcn10.c | 380 info->offset_mask = info->offset - 1; in id_to_offset()
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| /linux/drivers/mmc/host/ |
| A D | sdhci.c | 1122 unsigned int length_mask, offset_mask; in sdhci_prepare_data() local
1135 offset_mask = 0; in sdhci_prepare_data()
1144 offset_mask = 3; in sdhci_prepare_data()
1150 offset_mask = 3; in sdhci_prepare_data()
1153 if (unlikely(length_mask | offset_mask)) { in sdhci_prepare_data()
1161 if (sg->offset & offset_mask) { in sdhci_prepare_data()
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| A D | bios_parser.c | 1837 info->offset_mask = info->offset - 1; in bios_parser_get_gpio_pin_info()
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| A D | bios_parser2.c | 692 info->offset_mask = info->offset - 1; in bios_parser_get_gpio_pin_info()
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| /linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| A D | hclge_main.c | 6120 u16 data, offset, data_mask, offset_mask; in hclge_fd_parse_user_def_field() local
6135 offset_mask = be32_to_cpu(fs->m_ext.data[0]) & HCLGE_FD_USER_DEF_OFFSET; in hclge_fd_parse_user_def_field()
6149 if (offset_mask != HCLGE_FD_USER_DEF_OFFSET_UNMASK) { in hclge_fd_parse_user_def_field()
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