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Searched refs:out_be32 (Results 1 – 25 of 137) sorted by relevance

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/linux/arch/powerpc/platforms/52xx/
A Dlite5200_pm.c134 out_be32(&xlb->config, sxlb.config); in lite5200_restore_regs()
156 out_be32(&bes->taskBar, sbes.taskBar); in lite5200_restore_regs()
171 out_be32(&bes->MDEDebug, sbes.MDEDebug); in lite5200_restore_regs()
172 out_be32(&bes->ADSDebug, sbes.ADSDebug); in lite5200_restore_regs()
173 out_be32(&bes->Value1, sbes.Value1); in lite5200_restore_regs()
174 out_be32(&bes->Value2, sbes.Value2); in lite5200_restore_regs()
175 out_be32(&bes->Control, sbes.Control); in lite5200_restore_regs()
176 out_be32(&bes->Status, sbes.Status); in lite5200_restore_regs()
184 out_be32(&bes->IntPend, sbes.IntPend); in lite5200_restore_regs()
185 out_be32(&bes->IntMask, sbes.IntMask); in lite5200_restore_regs()
[all …]
A Dmpc52xx_pci.c118 out_be32(hose->cfg_addr, in mpc52xx_pci_read_config()
158 out_be32(hose->cfg_addr, 0); in mpc52xx_pci_read_config()
175 out_be32(hose->cfg_addr, in mpc52xx_pci_write_config()
222 out_be32(hose->cfg_addr, 0); in mpc52xx_pci_write_config()
256 out_be32(&pci_regs->scr, tmp); in mpc52xx_pci_setup()
262 out_be32(&pci_regs->iw0btar, in mpc52xx_pci_setup()
275 out_be32(&pci_regs->iw1btar, in mpc52xx_pci_setup()
293 out_be32(&pci_regs->iw2btar, in mpc52xx_pci_setup()
308 out_be32(&pci_regs->tbatr1, MPC52xx_PCI_TBATR_ENABLE); in mpc52xx_pci_setup()
319 out_be32(&pci_regs->gscr, tmp | MPC52xx_PCI_GSCR_PR); in mpc52xx_pci_setup()
[all …]
A Dmpc52xx_pic.c148 out_be32(addr, in_be32(addr) | (1 << bitno)); in io_be_setbit()
153 out_be32(addr, in_be32(addr) & ~(1 << bitno)); in io_be_clrbit()
198 out_be32(&intr->ctrl, ctrl_reg); in mpc52xx_extirq_set_type()
282 out_be32(&sdma->IntPend, 1 << l2irq); in mpc52xx_sdma_ack()
427 out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ in mpc52xx_init_irq()
436 out_be32(&intr->ctrl, intr_ctrl); in mpc52xx_init_irq()
439 out_be32(&intr->per_pri1, 0); in mpc52xx_init_irq()
440 out_be32(&intr->per_pri2, 0); in mpc52xx_init_irq()
441 out_be32(&intr->per_pri3, 0); in mpc52xx_init_irq()
442 out_be32(&intr->main_pri1, 0); in mpc52xx_init_irq()
[all …]
A Dmpc52xx_common.c71 out_be32(&xlb->master_pri_enable, 0xff); in mpc5200_setup_xlb_arbiter()
72 out_be32(&xlb->master_priority, 0x11111111); in mpc5200_setup_xlb_arbiter()
81 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS); in mpc5200_setup_xlb_arbiter()
197 out_be32(&mpc52xx_cdm->clk_enables, val | mask); in mpc52xx_set_psc_clkdiv()
214 out_be32(&mpc52xx_wdt->mode, 0x00000000); in mpc52xx_restart()
215 out_be32(&mpc52xx_wdt->count, 0x000000ff); in mpc52xx_restart()
216 out_be32(&mpc52xx_wdt->mode, 0x00009004); in mpc52xx_restart()
274 out_be32(&simple_gpio->port_config, mux & (~gpio)); in mpc5200_psc_ac97_gpio_reset()
298 out_be32(&simple_gpio->port_config, mux); in mpc5200_psc_ac97_gpio_reset()
/linux/arch/powerpc/sysdev/
A Dfsl_rmu.c376 out_be32(&pw->pw_regs->pwsr, IPWSR_CLEAR); in msg_unit_error_handler()
447 out_be32(&pw->pw_regs->pwmr, ipwmr); in fsl_rio_port_write_handler()
529 out_be32(&pw->pw_regs->pwmr, rval); in fsl_rio_pw_enable()
548 out_be32(&pw->pw_regs->pwmr, in fsl_rio_port_write_init()
564 out_be32(&pw->pw_regs->epwqbar, 0); in fsl_rio_port_write_init()
572 out_be32(&pw->pw_regs->pwsr, in fsl_rio_port_write_init()
577 out_be32(&pw->pw_regs->pwmr, in fsl_rio_port_write_init()
773 out_be32(&rmu->msg_regs->osr, 0x000000b3); in fsl_open_outb_mbox()
791 out_be32(&rmu->msg_regs->omr, in fsl_open_outb_mbox()
829 out_be32(&rmu->msg_regs->omr, 0); in fsl_close_outb_mbox()
[all …]
A Dcpm2_pic.c86 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_mask_irq()
98 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_unmask_irq()
109 out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit); in cpm2_ack()
121 out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]); in cpm2_end_irq()
180 out_be32(&cpm2_intctl->ic_siexr, vnew); in cpm2_set_irq_type()
240 out_be32(&cpm2_intctl->ic_simrh, 0x00000000); in cpm2_pic_init()
241 out_be32(&cpm2_intctl->ic_simrl, 0x00000000); in cpm2_pic_init()
246 out_be32(&cpm2_intctl->ic_sipnrh, 0xffffffff); in cpm2_pic_init()
247 out_be32(&cpm2_intctl->ic_sipnrl, 0xffffffff); in cpm2_pic_init()
258 out_be32(&cpm2_intctl->ic_scprrh, 0x05309770); in cpm2_pic_init()
[all …]
A Dfsl_rio.c118 out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), in fsl_rio_mcheck_exception()
171 out_be32(priv->regs_win + offset, data); in fsl_local_config_write()
210 out_be32(&priv->maint_atmu_regs->rowtar, in fsl_rio_config_read()
275 out_be32(&priv->maint_atmu_regs->rowtar, in fsl_rio_config_write()
288 out_be32((u32 *) data, val); in fsl_rio_config_write()
304 out_be32(&priv->inb_atmu_regs[i].riwar, 0); in fsl_rio_inbound_mem_init()
384 out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0); in fsl_rio_port_error_handler()
632 out_be32(priv->regs_win in fsl_rio_setup()
663 out_be32(priv->regs_win + RIO_GCCSR, in fsl_rio_setup()
681 out_be32(&priv->maint_atmu_regs->rowbar, in fsl_rio_setup()
[all …]
A Dfsl_lbc.c163 out_be32(&fsl_lbc_ctrl_dev->regs->mar, mar); in fsl_upm_run_pattern()
173 out_be32(io_base, 0x0); in fsl_upm_run_pattern()
193 out_be32(&lbc->lteatr, 0); in fsl_lbc_ctrl_init()
194 out_be32(&lbc->ltear, 0); in fsl_lbc_ctrl_init()
195 out_be32(&lbc->lteccr, LTECCR_CLEAR); in fsl_lbc_ctrl_init()
196 out_be32(&lbc->ltedr, LTEDR_ENABLE); in fsl_lbc_ctrl_init()
224 out_be32(&lbc->ltesr, LTESR_CLEAR); in fsl_lbc_ctrl_irq()
225 out_be32(&lbc->lteatr, 0); in fsl_lbc_ctrl_irq()
226 out_be32(&lbc->ltear, 0); in fsl_lbc_ctrl_irq()
337 out_be32(&fsl_lbc_ctrl_dev->regs->lteir, LTEIR_ENABLE); in fsl_lbc_ctrl_probe()
/linux/arch/powerpc/platforms/8xx/
A Dm8xx_setup.c71 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, ~KAPWR_KEY); in mpc8xx_calibrate_decr()
72 out_be32(&mpc8xx_immr->im_clkrstk.cark_sccrk, KAPWR_KEY); in mpc8xx_calibrate_decr()
102 out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, ~KAPWR_KEY); in mpc8xx_calibrate_decr()
103 out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, ~KAPWR_KEY); in mpc8xx_calibrate_decr()
104 out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, ~KAPWR_KEY); in mpc8xx_calibrate_decr()
105 out_be32(&mpc8xx_immr->im_sitk.sitk_tbscrk, KAPWR_KEY); in mpc8xx_calibrate_decr()
106 out_be32(&mpc8xx_immr->im_sitk.sitk_rtcsck, KAPWR_KEY); in mpc8xx_calibrate_decr()
107 out_be32(&mpc8xx_immr->im_sitk.sitk_tbk, KAPWR_KEY); in mpc8xx_calibrate_decr()
144 out_be32(&mpc8xx_immr->im_sitk.sitk_rtck, KAPWR_KEY); in mpc8xx_set_rtc_time()
145 out_be32(&mpc8xx_immr->im_sit.sit_rtc, (u32)time); in mpc8xx_set_rtc_time()
[all …]
/linux/arch/powerpc/platforms/83xx/
A Dsuspend.c133 out_be32(&pmc_regs->config1, reg_cfg1); in mpc83xx_change_state()
152 out_be32(&pmc_regs->event, event); in pmc_irq_handler()
163 out_be32(&clock_regs->sccr, saved_regs.sccr); in mpc83xx_suspend_restore_regs()
185 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
204 out_be32(&pmc_regs->mask, PMCER_ALL); in mpc83xx_suspend_enter()
206 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
214 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
217 out_be32(&pmc_regs->mask, PMCER_PMCI); in mpc83xx_suspend_enter()
221 out_be32(&pmc_regs->mask, PMCER_PMCI); in mpc83xx_suspend_enter()
229 out_be32(&pmc_regs->config1, in mpc83xx_suspend_enter()
[all …]
/linux/drivers/net/ethernet/freescale/
A Dfec_mpc52xx.c191 out_be32(&fec->r_cntrl, rcntrl); in mpc52xx_fec_adjust_link()
192 out_be32(&fec->x_cntrl, tcntrl); in mpc52xx_fec_adjust_link()
542 out_be32(&fec->mib_control, 0); in mpc52xx_fec_reset_stats()
560 out_be32(&fec->r_cntrl, rx_control); in mpc52xx_fec_set_multicast_list()
563 out_be32(&fec->r_cntrl, rx_control); in mpc52xx_fec_set_multicast_list()
581 out_be32(&fec->gaddr1, gaddr1); in mpc52xx_fec_set_multicast_list()
582 out_be32(&fec->gaddr2, gaddr2); in mpc52xx_fec_set_multicast_list()
678 out_be32(&fec->r_cntrl, rcntrl); in mpc52xx_fec_start()
679 out_be32(&fec->x_cntrl, tcntrl); in mpc52xx_fec_start()
682 out_be32(&fec->ievent, 0xffffffff); in mpc52xx_fec_start()
[all …]
/linux/drivers/edac/
A Dmpc85xx_edac.c226 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, ~0); in mpc85xx_pci_err_probe()
229 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, 0); in mpc85xx_pci_err_probe()
245 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0); in mpc85xx_pci_err_probe()
283 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0 in mpc85xx_pci_err_probe()
285 out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR, 0 in mpc85xx_pci_err_probe()
369 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJHI, in mpc85xx_l2_inject_data_hi_store()
382 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJLO, in mpc85xx_l2_inject_data_lo_store()
395 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRINJCTL, in mpc85xx_l2_inject_ctrl_store()
536 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDET, ~0); in mpc85xx_l2_err_probe()
541 out_be32(pdata->l2_vbase + MPC85XX_L2_ERRDIS, 0); in mpc85xx_l2_err_probe()
[all …]
/linux/drivers/mtd/nand/raw/
A Dfsl_elbc_nand.c168 out_be32(&lbc->fpar, in set_addr()
178 out_be32(&lbc->fpar, in set_addr()
282 out_be32(&lbc->fir, in fsl_elbc_do_read()
292 out_be32(&lbc->fir, in fsl_elbc_do_read()
399 out_be32(&lbc->fir, in fsl_elbc_cmdfunc()
406 out_be32(&lbc->fcr, in fsl_elbc_cmdfunc()
411 out_be32(&lbc->fbcr, 0); in fsl_elbc_cmdfunc()
443 out_be32(&lbc->fir, in fsl_elbc_cmdfunc()
452 out_be32(&lbc->fir, in fsl_elbc_cmdfunc()
487 out_be32(&lbc->fbcr, in fsl_elbc_cmdfunc()
[all …]
/linux/arch/powerpc/platforms/512x/
A Dmpc512x_shared.c36 out_be32(&reset_module_base->rpr, 0x52535445); in mpc512x_restart()
38 out_be32(&reset_module_base->rcr, 0x2); in mpc512x_restart()
263 out_be32(&diu_reg->gamma, virt_to_phys(&diu_shared_fb.gamma)); in mpc512x_init_diu()
264 out_be32(&diu_reg->desc[1], 0); in mpc512x_init_diu()
265 out_be32(&diu_reg->desc[2], 0); in mpc512x_init_diu()
266 out_be32(&diu_reg->desc[0], virt_to_phys(&diu_shared_fb.ad0)); in mpc512x_init_diu()
435 out_be32(&FIFOC(psc)->txcmd, 0x80); in mpc512x_psc_fifo_init()
436 out_be32(&FIFOC(psc)->txcmd, 0x01); in mpc512x_psc_fifo_init()
437 out_be32(&FIFOC(psc)->rxcmd, 0x80); in mpc512x_psc_fifo_init()
438 out_be32(&FIFOC(psc)->rxcmd, 0x01); in mpc512x_psc_fifo_init()
[all …]
A Dmpc512x_lpbfifo.c84 out_be32(&lpbfifo.regs->enable, in mpc512x_lpbfifo_irq()
89 out_be32(&lpbfifo.regs->status, MPC512X_SCLPC_SUCCESS); in mpc512x_lpbfifo_irq()
269 out_be32(&lpbfifo.regs->enable, in mpc512x_lpbfifo_kick()
271 out_be32(&lpbfifo.regs->enable, 0x0); in mpc512x_lpbfifo_kick()
280 out_be32(&lpbfifo.regs->fifo_ctrl, MPC512X_SCLPC_FIFO_CTRL(0x7)); in mpc512x_lpbfifo_kick()
287 out_be32(&lpbfifo.regs->start_addr, lpbfifo.req->dev_phys_addr); in mpc512x_lpbfifo_kick()
299 out_be32(&lpbfifo.regs->ctrl, bits); in mpc512x_lpbfifo_kick()
308 out_be32(&lpbfifo.regs->enable, bits); in mpc512x_lpbfifo_kick()
312 out_be32(&lpbfifo.regs->pkt_size, bits); in mpc512x_lpbfifo_kick()
324 out_be32(&lpbfifo.regs->enable, in mpc512x_lpbfifo_kick()
[all …]
/linux/sound/soc/fsl/
A Dmpc5200_psc_ac97.c49 out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); in psc_ac97_read()
88 out_be32(&psc_dma->psc_regs->ac97_cmd, in psc_ac97_write()
101 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); in psc_ac97_warm_reset()
103 out_be32(&regs->sicr, psc_dma->sicr); in psc_ac97_warm_reset()
118 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_ACRB); in psc_ac97_cold_reset()
168 out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000); in psc_ac97_hw_digital_params()
170 out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000); in psc_ac97_hw_digital_params()
188 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); in psc_ac97_trigger()
197 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); in psc_ac97_trigger()
305 out_be32(&regs->sicr, psc_dma->sicr); in psc_ac97_of_probe()
[all …]
A Dfsl_dma.c262 out_be32(&dma_channel->sr, sr2); in fsl_dma_isr()
441 out_be32(&dma_channel->clndar, in fsl_dma_open()
443 out_be32(&dma_channel->eclndar, in fsl_dma_open()
447 out_be32(&dma_channel->bcr, 0); in fsl_dma_open()
479 out_be32(&dma_channel->mr, mr); in fsl_dma_open()
612 out_be32(&dma_channel->mr, mr); in fsl_dma_hw_params()
749 out_be32(&dma_channel->mr, 0); in fsl_dma_hw_free()
752 out_be32(&dma_channel->sr, -1); in fsl_dma_hw_free()
756 out_be32(&dma_channel->sar, 0); in fsl_dma_hw_free()
758 out_be32(&dma_channel->dar, 0); in fsl_dma_hw_free()
[all …]
/linux/drivers/video/fbdev/
A Dplatinumfb.c280 out_be32(&platinum_regs->reg[i+32].r, init->regs[i]); in platinum_set_hardware()
286 out_be32(&platinum_regs->reg[18].r, init->pitch[cmode]); in platinum_set_hardware()
291 out_be32(&platinum_regs->reg[21].r, 0x100); in platinum_set_hardware()
292 out_be32(&platinum_regs->reg[22].r, 1); in platinum_set_hardware()
293 out_be32(&platinum_regs->reg[23].r, 1); in platinum_set_hardware()
294 out_be32(&platinum_regs->reg[26].r, 0xc00); in platinum_set_hardware()
295 out_be32(&platinum_regs->reg[27].r, 0x235); in platinum_set_hardware()
306 out_be32(&platinum_regs->reg[24].r, 0); /* turn display on */ in platinum_set_hardware()
416 out_be32(&platinum_regs->reg[23].r, 3); /* drive A low */ in read_platinum_sense()
419 out_be32(&platinum_regs->reg[23].r, 5); /* drive B low */ in read_platinum_sense()
[all …]
/linux/drivers/char/xilinx_hwicap/
A Dfifo_icap.c97 out_be32(drvdata->base_address + XHI_WF_OFFSET, data); in fifo_icap_fifo_write()
121 out_be32(drvdata->base_address + XHI_SZ_OFFSET, data); in fifo_icap_set_read_size()
130 out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_WRITE_MASK); in fifo_icap_start_config()
140 out_be32(drvdata->base_address + XHI_CR_OFFSET, XHI_CR_READ_MASK); in fifo_icap_start_readback()
366 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_reset()
369 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_reset()
387 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_flush_fifo()
390 out_be32(drvdata->base_address + XHI_CR_OFFSET, in fifo_icap_flush_fifo()
/linux/drivers/spi/
A Dspi-mpc512x-psc.c111 out_be32(psc_addr(mps, sicr), sicr); in mpc512x_psc_spi_activate_cs()
121 out_be32(psc_addr(mps, ccr), ccr); in mpc512x_psc_spi_activate_cs()
352 out_be32(&fifo->tximr, 0); in mpc512x_psc_spi_unprep_xfer_hw()
401 out_be32(&fifo->tximr, 0); in mpc512x_psc_spi_port_config()
402 out_be32(&fifo->rximr, 0); in mpc512x_psc_spi_port_config()
421 out_be32(psc_addr(mps, ccr), ccr); in mpc512x_psc_spi_port_config()
428 out_be32(&fifo->rxalarm, 0xfff); in mpc512x_psc_spi_port_config()
429 out_be32(&fifo->txalarm, 0); in mpc512x_psc_spi_port_config()
432 out_be32(&fifo->rxcmd, in mpc512x_psc_spi_port_config()
434 out_be32(&fifo->txcmd, in mpc512x_psc_spi_port_config()
[all …]
/linux/drivers/tty/serial/
A Dmpc52xx_uart.c178 out_be32(&PSC(port)->sicr, val); in mpc52xx_psc_set_sicr()
430 out_be32(&FIFO_512x(port)->tximr, 0); in mpc512x_psc_fifo_init()
435 out_be32(&FIFO_512x(port)->rximr, 0); in mpc512x_psc_fifo_init()
523 out_be32(&FIFO_512x(port)->tximr, 0); in mpc512x_psc_cw_disable_ints()
524 out_be32(&FIFO_512x(port)->rximr, 0); in mpc512x_psc_cw_disable_ints()
529 out_be32(&FIFO_512x(port)->tximr, in mpc512x_psc_cw_restore_ints()
771 out_be32(&FIFO_5125(port)->tximr, 0); in mpc5125_psc_fifo_init()
776 out_be32(&FIFO_5125(port)->rximr, 0); in mpc5125_psc_fifo_init()
861 out_be32(&FIFO_5125(port)->tximr, 0); in mpc5125_psc_cw_disable_ints()
862 out_be32(&FIFO_5125(port)->rximr, 0); in mpc5125_psc_cw_disable_ints()
[all …]
/linux/arch/powerpc/platforms/cell/
A Dspider-pic.c75 out_be32(cfg, in_be32(cfg) | 0x30000000u); in spider_unmask_irq()
83 out_be32(cfg, in_be32(cfg) & ~0x30000000u); in spider_mask_irq()
101 out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf)); in spider_ack_irq()
144 out_be32(cfg, old_mask | (ic << 24) | (0x7 << 16) | in spider_set_irq_type()
146 out_be32(cfg + 4, (0x2 << 16) | (hw & 0xff)); in spider_set_irq_type()
293 out_be32(cfg, in_be32(cfg) & ~0x30000000u); in spider_init_one()
297 out_be32(pic->regs + TIR_MSK, 0x0); in spider_init_one()
300 out_be32(pic->regs + TIR_PIEN, in_be32(pic->regs + TIR_PIEN) | 0x1); in spider_init_one()
313 out_be32(pic->regs + TIR_DEN, in_be32(pic->regs + TIR_DEN) | 0x1); in spider_init_one()
/linux/arch/powerpc/sysdev/ge/
A Dge_pic.c122 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); in gef_pic_mask()
143 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); in gef_pic_unmask()
201 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0); in gef_pic_init()
202 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_INTR_MASK, 0); in gef_pic_init()
204 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0); in gef_pic_init()
205 out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0); in gef_pic_init()
/linux/arch/powerpc/platforms/cell/spufs/
A Dhw_ops.c112 out_be32(&prob->spu_mb_W, data); in spu_hw_wbox_write()
126 out_be32(&ctx->spu->problem->signal_notify1, data); in spu_hw_signal1_write()
131 out_be32(&ctx->spu->problem->signal_notify2, data); in spu_hw_signal2_write()
183 out_be32(&ctx->spu->problem->spu_npc_RW, val); in spu_hw_npc_write()
212 out_be32(&ctx->spu->problem->spu_runcntl_RW, val); in spu_hw_runcntl_write()
219 out_be32(&ctx->spu->problem->spu_runcntl_RW, SPU_RUNCNTL_STOP); in spu_hw_runcntl_stop()
257 out_be32(&prob->dma_querymask_RW, mask); in spu_hw_set_mfc_query()
258 out_be32(&prob->dma_querytype_RW, mode); in spu_hw_set_mfc_query()
281 out_be32(&prob->mfc_lsa_W, cmd->lsa); in spu_hw_send_mfc_command()
283 out_be32(&prob->mfc_union_W.by32.mfc_size_tag32, in spu_hw_send_mfc_command()
[all …]
/linux/arch/powerpc/boot/
A Dcuboot-pq2.c101 out_be32(&ctrl_addr[cs * 2], 0); in update_cs_ranges()
102 out_be32(&ctrl_addr[cs * 2 + 1], in update_cs_ranges()
104 out_be32(&ctrl_addr[cs * 2], base | cs_ranges_buf[i].addr); in update_cs_ranges()
185 out_be32(&pci_regs[1][0], mem_base->phys_addr | 1); in fixup_pci()
186 out_be32(&pci_regs[2][0], ~(mem->size[1] + mmio->size[1] - 1)); in fixup_pci()
188 out_be32(&pci_regs[1][1], io->phys_addr | 1); in fixup_pci()
189 out_be32(&pci_regs[2][1], ~(io->size[1] - 1)); in fixup_pci()
230 out_be32((u32 *)&soc_regs[0x1002c], 0x01236745); in fixup_pci()

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