pfit_control (reference) in projects: linux

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Searched refs:pfit_control (Results 1 – 7 of 7) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A D	intel_panel.c	516 u32 pfit_control) in i965_scale_aspect() argument 527 pfit_control \|= PFIT_ENABLE \| in i965_scale_aspect() 530 pfit_control \|= PFIT_ENABLE \| in i965_scale_aspect() 563 pfit_control \|= (PFIT_ENABLE \| in i9xx_scale_aspect() 578 pfit_control \|= (PFIT_ENABLE \| in i9xx_scale_aspect() 584 pfit_control \|= (PFIT_ENABLE \| in i9xx_scale_aspect() 632 pfit_control \|= PFIT_ENABLE; in gmch_panel_fitting() 634 pfit_control \|= PFIT_SCALING_AUTO; in gmch_panel_fitting() 636 pfit_control \|= (PFIT_VERT_AUTO_SCALE \| in gmch_panel_fitting() 653 if ((pfit_control & PFIT_ENABLE) == 0) { in gmch_panel_fitting() [all …]
/linux/drivers/gpu/drm/gma500/
A D	cdv_intel_lvds.c	`267 u32 pfit_control; in cdv_intel_lvds_mode_set() local 282 pfit_control = (PFIT_ENABLE \| VERT_AUTO_SCALE \| in cdv_intel_lvds_mode_set() 286 pfit_control = 0; in cdv_intel_lvds_mode_set() 288 pfit_control \|= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_lvds_mode_set() 291 pfit_control \|= PANEL_8TO6_DITHER_ENABLE; in cdv_intel_lvds_mode_set() 293 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_lvds_mode_set()`
A D	psb_intel_lvds.c	`461 u32 pfit_control; in psb_intel_lvds_mode_set() local 476 pfit_control = (PFIT_ENABLE \| VERT_AUTO_SCALE \| in psb_intel_lvds_mode_set() 480 pfit_control = 0; in psb_intel_lvds_mode_set() 483 pfit_control \|= PANEL_8TO6_DITHER_ENABLE; in psb_intel_lvds_mode_set() 485 REG_WRITE(PFIT_CONTROL, pfit_control); in psb_intel_lvds_mode_set()`
A D	oaktrail_crtc.c	`349 u32 pfit_control; in oaktrail_panel_fitter_pipe() local 351 pfit_control = REG_READ(PFIT_CONTROL); in oaktrail_panel_fitter_pipe() 354 if ((pfit_control & PFIT_ENABLE) == 0) in oaktrail_panel_fitter_pipe() 356 return (pfit_control >> 29) & 3; in oaktrail_panel_fitter_pipe()`
A D	psb_intel_display.c	`82 u32 pfit_control; in psb_intel_panel_fitter_pipe() local 84 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe() 87 if ((pfit_control & PFIT_ENABLE) == 0) in psb_intel_panel_fitter_pipe()`
A D	cdv_intel_display.c	`561 u32 pfit_control; in cdv_intel_panel_fitter_pipe() local 563 pfit_control = REG_READ(PFIT_CONTROL); in cdv_intel_panel_fitter_pipe() 566 if ((pfit_control & PFIT_ENABLE) == 0) in cdv_intel_panel_fitter_pipe() 568 return (pfit_control >> 29) & 0x3; in cdv_intel_panel_fitter_pipe()`
A D	cdv_intel_dp.c	`1088 uint32_t pfit_control; in cdv_intel_dp_mode_set() local 1093 pfit_control = PFIT_ENABLE; in cdv_intel_dp_mode_set() 1095 pfit_control = 0; in cdv_intel_dp_mode_set() 1097 pfit_control \|= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_dp_mode_set() 1099 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_dp_mode_set()`

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