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Searched refs:phase (Results 1 – 25 of 494) sorted by relevance

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/linux/drivers/clk/hisilicon/
A Dclk-hisi-phase.c47 regval = readl(phase->reg); in hisi_clk_get_phase()
48 regval = (regval & phase->mask) >> phase->shift; in hisi_clk_get_phase()
78 val = readl(phase->reg); in hisi_clk_set_phase()
79 val &= ~phase->mask; in hisi_clk_set_phase()
80 val |= regval << phase->shift; in hisi_clk_set_phase()
81 writel(val, phase->reg); in hisi_clk_set_phase()
97 struct clk_hisi_phase *phase; in clk_register_hisi_phase() local
101 if (!phase) in clk_register_hisi_phase()
111 phase->shift = clks->shift; in clk_register_hisi_phase()
113 phase->lock = lock; in clk_register_hisi_phase()
[all …]
/linux/drivers/clk/sunxi-ng/
A Dccu_phase.c15 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_get_phase() local
22 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_get_phase()
23 delay = (reg >> phase->shift); in ccu_phase_get_phase()
24 delay &= (1 << phase->width) - 1; in ccu_phase_get_phase()
58 struct ccu_phase *phase = hw_to_ccu_phase(hw); in ccu_phase_set_phase() local
110 spin_lock_irqsave(phase->common.lock, flags); in ccu_phase_set_phase()
111 reg = readl(phase->common.base + phase->common.reg); in ccu_phase_set_phase()
112 reg &= ~GENMASK(phase->width + phase->shift - 1, phase->shift); in ccu_phase_set_phase()
113 writel(reg | (delay << phase->shift), in ccu_phase_set_phase()
114 phase->common.base + phase->common.reg); in ccu_phase_set_phase()
[all …]
/linux/drivers/gpu/drm/tidss/
A Dtidss_dispc_regs.h120 #define DISPC_VID_FIR_COEF_H0(phase) (0x6c + (phase) * 4) argument
122 #define DISPC_VID_FIR_COEF_H0_C(phase) (0x90 + (phase) * 4) argument
125 #define DISPC_VID_FIR_COEF_H12(phase) (0xb4 + (phase) * 4) argument
127 #define DISPC_VID_FIR_COEF_H12_C(phase) (0xf4 + (phase) * 4) argument
130 #define DISPC_VID_FIR_COEF_V0(phase) (0x134 + (phase) * 4) argument
132 #define DISPC_VID_FIR_COEF_V0_C(phase) (0x158 + (phase) * 4) argument
135 #define DISPC_VID_FIR_COEF_V12(phase) (0x17c + (phase) * 4) argument
137 #define DISPC_VID_FIR_COEF_V12_C(phase) (0x1bc + (phase) * 4) argument
/linux/drivers/clk/sunxi/
A Dclk-mod0.c179 value = readl(phase->reg); in mmc_get_phase()
268 value &= ~GENMASK(phase->offset + 3, phase->offset); in mmc_set_phase()
324 struct mmc_phase *phase; in sunxi_mmc_setup() local
326 phase = kmalloc(sizeof(*phase), GFP_KERNEL); in sunxi_mmc_setup()
327 if (!phase) in sunxi_mmc_setup()
330 phase->hw.init = &init; in sunxi_mmc_setup()
331 phase->reg = reg; in sunxi_mmc_setup()
332 phase->lock = lock; in sunxi_mmc_setup()
335 phase->offset = 8; in sunxi_mmc_setup()
337 phase->offset = 20; in sunxi_mmc_setup()
[all …]
/linux/drivers/hwmon/pmbus/
A Dmp2888.c98 ret = pmbus_read_word_data(client, page, phase, reg); in mp2888_read_phase()
102 if (!((phase + 1) % 2)) in mp2888_read_phase()
132 switch (phase) { in mp2888_read_phases()
162 ret = pmbus_read_word_data(client, page, phase, reg); in mp2888_read_word_data()
174 ret = pmbus_read_word_data(client, page, phase, reg); in mp2888_read_word_data()
184 if (phase != 0xff) in mp2888_read_word_data()
185 return mp2888_read_phases(client, data, page, phase); in mp2888_read_word_data()
187 ret = pmbus_read_word_data(client, page, phase, reg); in mp2888_read_word_data()
198 ret = pmbus_read_word_data(client, page, phase, reg); in mp2888_read_word_data()
211 ret = pmbus_read_word_data(client, page, phase, reg); in mp2888_read_word_data()
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A Dmp2856.c122 int phase, u8 reg) in mp2856_read_vout() argument
140 int page, int phase, u8 reg) in mp2856_read_phase() argument
149 if (!((phase + 1) % MP2856_PAGE_NUM)) in mp2856_read_phase()
163 int page, int phase) in mp2856_read_phases() argument
168 switch (phase) { in mp2856_read_phases()
170 ret = mp2856_read_phase(client, data, page, phase, in mp2856_read_phases()
174 ret = mp2856_read_phase(client, data, page, phase, in mp2856_read_phases()
178 ret = mp2856_read_phase(client, data, page, phase, in mp2856_read_phases()
189 switch (phase) { in mp2856_read_phases()
207 int phase, int reg) in mp2856_read_word_data() argument
[all …]
A Dmp2975.c210 int page, int phase, u8 reg) in mp2975_read_phase() argument
218 if (!((phase + 1) % MP2975_PAGE_NUM)) in mp2975_read_phase()
251 int page, int phase) in mp2975_read_phases() argument
256 switch (phase) { in mp2975_read_phases()
273 switch (phase) { in mp2975_read_phases()
306 int phase, int reg) in mp2973_read_word_data() argument
334 ret = mp2975_read_word_helper(client, page, phase, in mp2973_read_word_data()
350 ret = pmbus_read_word_data(client, page, phase, in mp2973_read_word_data()
354 ret = pmbus_read_word_data(client, page, phase, in mp2973_read_word_data()
358 ret = mp2975_read_word_helper(client, page, phase, in mp2973_read_word_data()
[all …]
A Dir35221.c25 int phase, int reg) in ir35221_read_word_data() argument
31 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
35 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
39 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
43 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
47 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
51 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
55 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
59 ret = pmbus_read_word_data(client, page, phase, in ir35221_read_word_data()
A Dmp2891.c222 int phase, int reg) in mp2891_read_word_data() argument
230 ret = pmbus_read_word_data(client, page, phase, reg); in mp2891_read_word_data()
274 ret = pmbus_read_word_data(client, page, phase, reg); in mp2891_read_word_data()
282 ret = pmbus_read_word_data(client, page, phase, reg); in mp2891_read_word_data()
289 ret = pmbus_read_word_data(client, page, phase, reg); in mp2891_read_word_data()
302 ret = pmbus_read_word_data(client, page, phase, reg); in mp2891_read_word_data()
314 ret = pmbus_read_word_data(client, page, phase, reg); in mp2891_read_word_data()
321 ret = pmbus_read_word_data(client, page, phase, reg); in mp2891_read_word_data()
334 ret = pmbus_read_word_data(client, page, phase, reg); in mp2891_read_word_data()
359 ret = pmbus_read_word_data(client, 0, phase, reg); in mp2891_read_word_data()
[all …]
/linux/drivers/gpu/drm/imx/dcss/
A Ddcss-scaler.c178 int phase; in dcss_scaler_gaussian_filter() local
183 for (phase = 0; phase < PSC_STORED_PHASES; phase++) { in dcss_scaler_gaussian_filter()
184 coef[phase][0] = 0; in dcss_scaler_gaussian_filter()
185 coef[phase][PSC_NUM_TAPS - 1] = 0; in dcss_scaler_gaussian_filter()
232 for (phase = 0; phase < PSC_STORED_PHASES; phase++) { in dcss_scaler_gaussian_filter()
237 sum += coef[phase][i]; in dcss_scaler_gaussian_filter()
239 ll_temp = coef[phase][i]; in dcss_scaler_gaussian_filter()
243 coef[phase][i] = (int)ll_temp; in dcss_scaler_gaussian_filter()
574 int i, phase; in dcss_scaler_program_5_coef_set() local
609 int i, phase; in dcss_scaler_program_7_coef_set() local
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/linux/drivers/char/
A Dppdev.c404 pp->saved_state.phase = info->phase; in pp_do_ioctl()
406 info->phase = pp->state.phase; in pp_do_ioctl()
465 pp->state.phase = phase; in pp_do_ioctl()
468 pp->pdev->port->ieee1284.phase = phase; in pp_do_ioctl()
479 phase = pp->state.phase; in pp_do_ioctl()
551 pp->state.phase = info->phase; in pp_do_ioctl()
553 info->phase = pp->saved_state.phase; in pp_do_ioctl()
729 pp->saved_state.phase = info->phase; in pp_release()
731 info->phase = pp->state.phase; in pp_release()
748 pp->state.phase = info->phase; in pp_release()
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/linux/lib/zstd/compress/
A Dzstd_cwksp.h153 ZSTD_cwksp_alloc_phase_e phase; member
275 assert(phase >= ws->phase); in ZSTD_cwksp_internal_advance_phase()
276 if (phase > ws->phase) { in ZSTD_cwksp_internal_advance_phase()
278 if (ws->phase < ZSTD_cwksp_alloc_buffers && in ZSTD_cwksp_internal_advance_phase()
279 phase >= ZSTD_cwksp_alloc_buffers) { in ZSTD_cwksp_internal_advance_phase()
284 if (ws->phase < ZSTD_cwksp_alloc_aligned && in ZSTD_cwksp_internal_advance_phase()
285 phase >= ZSTD_cwksp_alloc_aligned) { in ZSTD_cwksp_internal_advance_phase()
306 ws->phase = phase; in ZSTD_cwksp_internal_advance_phase()
483 if (ws->phase > ZSTD_cwksp_alloc_buffers) { in ZSTD_cwksp_clear()
484 ws->phase = ZSTD_cwksp_alloc_buffers; in ZSTD_cwksp_clear()
[all …]
/linux/fs/bcachefs/
A Dbtree_gc.h34 static inline struct gc_pos gc_phase(enum gc_phase phase) in gc_phase() argument
36 return (struct gc_pos) { .phase = phase, }; in gc_phase()
43 .phase = GC_PHASE_btree, in gc_pos_btree()
61 return cmp_int(l.phase, r.phase) ?: in gc_pos_cmp()
/linux/drivers/parport/
A Dieee1284_ops.c171 port->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_read_nibble()
345 port->ieee1284.phase = IEEE1284_PH_REV_IDLE; in ecp_forward_to_reverse()
374 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in ecp_reverse_to_forward()
401 if (port->ieee1284.phase != IEEE1284_PH_FWD_IDLE) in parport_ieee1284_ecp_write_data()
405 port->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_ieee1284_ecp_write_data()
467 port->ieee1284.phase = IEEE1284_PH_FWD_IDLE; in parport_ieee1284_ecp_write_data()
489 if (port->ieee1284.phase != IEEE1284_PH_REV_IDLE) in parport_ieee1284_ecp_read_data()
493 port->ieee1284.phase = IEEE1284_PH_REV_DATA; in parport_ieee1284_ecp_read_data()
612 port->ieee1284.phase = IEEE1284_PH_REV_IDLE; in parport_ieee1284_ecp_read_data()
635 port->ieee1284.phase = IEEE1284_PH_FWD_DATA; in parport_ieee1284_ecp_write_addr()
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/linux/Documentation/devicetree/bindings/mmc/
A Dsamsung,exynos-dw-mshc.yaml61 - description: CIU clock phase shift value for tx mode
64 - description: CIU clock phase shift value for rx mode
68 The value of CUI clock phase shift value in transmit mode and CIU clock
69 phase shift value in receive mode for double data rate mode operation.
75 - description: CIU clock phase shift value for tx mode
78 - description: CIU clock phase shift value for rx mode
82 The value of CIU TX and RX clock phase shift value for HS400 mode
85 - valid value for tx phase shift and rx phase shift is 0 to 7.
89 phase shift clocks should be 0.
95 - description: CIU clock phase shift value for tx mode
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/linux/drivers/net/wwan/iosm/
A Diosm_ipc_imem_ops.c66 if (ipc_imem->phase != IPC_P_RUN) { in ipc_imem_sys_wwan_transmit()
146 enum ipc_phase phase; in ipc_imem_is_channel_active() local
149 phase = ipc_imem->phase; in ipc_imem_is_channel_active()
152 switch (phase) { in ipc_imem_is_channel_active()
174 channel->channel_id, phase); in ipc_imem_is_channel_active()
203 curr_phase = ipc_imem->phase; in ipc_imem_sys_port_close()
323 ipc_imem->phase == IPC_P_OFF_REQ) in ipc_imem_sys_cdev_write()
349 enum ipc_phase phase; in ipc_imem_sys_devlink_open() local
353 switch (phase) { in ipc_imem_sys_devlink_open()
529 ipc_imem->phase = IPC_P_PSI; in ipc_imem_sys_psi_transfer()
[all …]
A Diosm_ipc_imem.c654 old_phase = ipc_imem->phase; in ipc_imem_handle_irq()
666 switch (phase) { in ipc_imem_handle_irq()
772 if ((phase == IPC_P_PSI || phase == IPC_P_EBL) && in ipc_imem_handle_irq()
859 return ipc_imem->phase; in ipc_imem_phase_update_check()
915 ipc_imem->phase : in ipc_imem_phase_update()
921 switch (phase) { in ipc_imem_phase_get_string()
1265 ipc_imem->phase = IPC_P_OFF; in ipc_imem_cleanup()
1275 enum ipc_phase phase; in ipc_imem_config() local
1289 switch (phase) { in ipc_imem_config()
1320 phase); in ipc_imem_config()
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/linux/drivers/gpu/drm/amd/display/dc/dccg/dcn21/
A Ddcn21_dccg.c53 int phase; in dccg21_update_dpp_dto() local
67 phase = (req_dppclk + 9999) / 10000; in dccg21_update_dpp_dto()
69 if (phase > modulo) { in dccg21_update_dpp_dto()
74 phase = modulo; in dccg21_update_dpp_dto()
85 phase = 10; in dccg21_update_dpp_dto()
89 DPPCLK0_DTO_PHASE, phase, in dccg21_update_dpp_dto()
/linux/include/trace/events/
A Dclk.h200 TP_PROTO(struct clk_core *core, int phase),
202 TP_ARGS(core, phase),
206 __field( int, phase )
211 __entry->phase = phase;
214 TP_printk("%s %d", __get_str(name), (int)__entry->phase)
219 TP_PROTO(struct clk_core *core, int phase),
221 TP_ARGS(core, phase)
226 TP_PROTO(struct clk_core *core, int phase),
228 TP_ARGS(core, phase)
/linux/fs/
A Dfsopen.c141 fc->phase = FS_CONTEXT_CREATE_PARAMS; in SYSCALL_DEFINE2()
194 fc->phase = FS_CONTEXT_RECONF_PARAMS; in SYSCALL_DEFINE3()
216 if (fc->phase != FS_CONTEXT_CREATE_PARAMS) in vfs_cmd_create()
222 fc->phase = FS_CONTEXT_CREATING; in vfs_cmd_create()
227 fc->phase = FS_CONTEXT_FAILED; in vfs_cmd_create()
235 fc->phase = FS_CONTEXT_FAILED; in vfs_cmd_create()
241 fc->phase = FS_CONTEXT_AWAITING_MOUNT; in vfs_cmd_create()
250 if (fc->phase != FS_CONTEXT_RECONF_PARAMS) in vfs_cmd_reconfigure()
253 fc->phase = FS_CONTEXT_RECONFIGURING; in vfs_cmd_reconfigure()
257 fc->phase = FS_CONTEXT_FAILED; in vfs_cmd_reconfigure()
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/linux/drivers/char/ipmi/
A Dkcs_bmc_cdev_ipmi.c76 enum kcs_ipmi_phases phase; member
133 priv->phase = KCS_PHASE_ERROR; in kcs_bmc_ipmi_force_abort()
145 switch (priv->phase) { in kcs_bmc_ipmi_handle_data()
147 priv->phase = KCS_PHASE_WRITE_DATA; in kcs_bmc_ipmi_handle_data()
165 priv->phase = KCS_PHASE_WRITE_DONE; in kcs_bmc_ipmi_handle_data()
187 priv->phase = KCS_PHASE_IDLE; in kcs_bmc_ipmi_handle_data()
198 priv->phase = KCS_PHASE_ABORT_ERROR2; in kcs_bmc_ipmi_handle_data()
205 priv->phase = KCS_PHASE_IDLE; in kcs_bmc_ipmi_handle_data()
224 priv->phase = KCS_PHASE_WRITE_START; in kcs_bmc_ipmi_handle_cmd()
368 priv->phase = KCS_PHASE_WAIT_READ; in kcs_bmc_ipmi_read()
[all …]
/linux/drivers/scsi/pcmcia/
A Dnsp_cs.c371 unsigned char phase, arbit; in nsphw_start_selection() local
376 if(phase != BUSMON_BUS_FREE) { in nsphw_start_selection()
383 scsi_pointer->phase = PH_ARBSTART; in nsphw_start_selection()
403 scsi_pointer->phase = PH_SELSTART; in nsphw_start_selection()
548 unsigned char phase, i_src; in nsp_expect_signal() local
555 if (phase == 0xff) { in nsp_expect_signal()
564 if ((phase & mask) != 0 && (phase & BUSMON_PHASE_MASK) == current_phase) { in nsp_expect_signal()
602 if (phase & BUSMON_IO) { in nsp_xfer()
641 scsi_pointer->phase = PH_DATA; in nsp_dataphase_bypass()
1085 switch (scsi_pointer->phase) { in nspintr()
[all …]
/linux/drivers/mmc/core/
A Dhost.c222 struct mmc_clk_phase *phase) in mmc_of_parse_timing_phase() argument
228 phase->valid = !rc; in mmc_of_parse_timing_phase()
229 if (phase->valid) { in mmc_of_parse_timing_phase()
230 phase->in_deg = degrees[0]; in mmc_of_parse_timing_phase()
231 phase->out_deg = degrees[1]; in mmc_of_parse_timing_phase()
239 &map->phase[MMC_TIMING_LEGACY]); in mmc_of_parse_clk_phase()
241 &map->phase[MMC_TIMING_MMC_HS]); in mmc_of_parse_clk_phase()
243 &map->phase[MMC_TIMING_SD_HS]); in mmc_of_parse_clk_phase()
245 &map->phase[MMC_TIMING_UHS_SDR12]); in mmc_of_parse_clk_phase()
247 &map->phase[MMC_TIMING_UHS_SDR25]); in mmc_of_parse_clk_phase()
[all …]
/linux/Documentation/devicetree/bindings/spi/
A Dsamsung,spi-peripheral-props.yaml23 The sampling phase shift to be applied on the miso line (to account
25 - 0: No phase shift.
26 - 1: 90 degree phase shift sampling.
27 - 2: 180 degree phase shift sampling.
28 - 3: 270 degree phase shift sampling.
/linux/drivers/leds/trigger/
A Dledtrig-heartbeat.c27 unsigned int phase; member
52 switch (heartbeat_data->phase) { in led_heartbeat_function()
65 heartbeat_data->phase++; in led_heartbeat_function()
71 heartbeat_data->phase++; in led_heartbeat_function()
77 heartbeat_data->phase++; in led_heartbeat_function()
84 heartbeat_data->phase = 0; in led_heartbeat_function()
140 heartbeat_data->phase = 0; in heartbeat_trig_activate()

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