| /linux/drivers/net/phy/ |
| A D | phy-c45.c | 40 stat1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in genphy_c45_pma_can_sleep() 370 ret = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_check_and_restart_aneg() 404 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_aneg_done() 425 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link() 448 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link() 455 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link() 529 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in genphy_c45_read_lpa() 654 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_read_mdix() 1041 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in genphy_c45_pma_read_ext_abilities() 1366 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in genphy_c45_plca_set_cfg() [all …]
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| A D | bcm87xx.c | 60 val = phy_read_mmd(phydev, devid, reg); in bcm87xx_of_reg_init() 106 rx_signal_detect = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in bcm87xx_read_status() 114 pcs_status = phy_read_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_read_status() 122 xgxs_lane_status = phy_read_mmd(phydev, MDIO_MMD_PHYXS, in bcm87xx_read_status() 144 reg = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_CONTROL); in bcm87xx_config_intr() 150 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr() 164 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr()
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| A D | bcm84881.c | 129 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_aneg_done() 133 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_aneg_done() 146 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in bcm84881_read_status() 155 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_read_status() 159 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_read_status() 185 val = phy_read_mmd(phydev, MDIO_MMD_AN, in bcm84881_read_status() 209 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011); in bcm84881_read_status()
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| A D | marvell-88q2xxx.c | 203 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT); in mv88q2xxx_read_link_gbit() 215 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_gbit() 224 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_gbit() 250 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_100m() 260 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_read_link_100m() 443 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_get_sqi() 458 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, 0xfc88); in mv88q2xxx_get_sqi() 514 irq = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_handle_interrupt() 607 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_hwmon_read() 616 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, in mv88q2xxx_hwmon_read() [all …]
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| A D | teranetics.c | 39 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) in teranetics_aneg_done() 54 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) { in teranetics_read_status() 55 reg = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); in teranetics_read_status() 62 reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in teranetics_read_status()
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| A D | adin1100.c | 84 ret = phy_read_mmd(phydev, MDIO_MMD_AN, ADIN_AN_PHY_INST_STATUS); in adin_read_status() 148 int rc = phy_read_mmd(phydev, MDIO_MMD_VEND2, in adin_phy_ack_intr() 177 irq_status = phy_read_mmd(phydev, MDIO_MMD_VEND2, in adin_phy_handle_interrupt() 249 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT); in adin_get_features() 283 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in adin_get_sqi() 289 ret = phy_read_mmd(phydev, MDIO_STAT1, ADIN_MSE_VAL); in adin_get_sqi()
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| A D | marvell10g.c | 195 return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP); in mv3310_hwmon_read_temp_reg() 200 return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP); in mv2110_hwmon_read_temp_reg() 376 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1); in mv3310_get_downshift() 437 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1); in mv3310_get_edpd() 522 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_BOOT); in mv3310_probe() 538 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER0); in mv3310_probe() 890 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in mv3310_get_features() 1044 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in mv3310_read_status_copper() 1048 cssr1 = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSSR1); in mv3310_read_status_copper() 1101 val = phy_read_mmd(phydev, MDIO_MMD_AN, MV_AN_STAT1000); in mv3310_read_status_copper() [all …]
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| A D | dp83tc811.c | 120 value = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol() 166 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_get_wol() 172 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 177 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 182 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 369 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_suspend()
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| A D | dp83td510.c | 217 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_INTERRUPT_REG_1); in dp83td510_handle_interrupt() 264 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83td510_read_status() 307 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_MSE_DETECT); in dp83td510_get_sqi() 442 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_TDR_CFG); in dp83td510_cable_test_get_tdr_status() 452 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83td510_cable_test_get_tdr_status() 511 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_ALCD_STAT); in dp83td510_cable_test_get_alcd_status()
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| A D | microchip_t1s.c | 109 return phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN865X_REG_CFGPARAM_DATA); in lan865x_revb0_indirect_read() 138 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in lan865x_read_cfg_params() 223 err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2); in lan867x_revb1_config_init() 229 err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2); in lan867x_revb1_config_init()
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| A D | dp83822.c | 169 value = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_config_wol() 229 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_get_wol() 235 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 240 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 245 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 671 val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1); in dp83822_read_straps() 746 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_suspend() 760 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_resume()
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| A D | dp83867.c | 216 val_rxcfg = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_set_wol() 284 value = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_get_wol() 296 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 301 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 306 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 517 const u16 val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_verify_rgmii_cfg() 700 delay = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL); in dp83867_of_init() 781 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS2); in dp83867_config_init() 831 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS1); in dp83867_config_init() 846 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL); in dp83867_config_init() [all …]
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| A D | nxp-c45-tja11xx.c | 380 ts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 382 ts->tv_nsec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 384 ts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 386 ts->tv_sec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 506 extts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 510 extts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 525 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, in tja1120_extts_is_valid() 541 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, in tja1120_get_extts() 1647 phy_abilities = phy_read_mmd(phydev, MDIO_MMD_VEND1, in nxp_c45_probe() 1738 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in tja1103_nmi_handler() [all …]
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| A D | marvell-88x2222.c | 307 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_aneg_done() 315 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_aneg_done() 328 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_read_status_10g() 364 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_read_status_1g() 390 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_PHY_STAT); in mv2222_read_status_1g() 416 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_RX_SIGNAL_DETECT); in mv2222_link_is_operational()
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| A D | adin.c | 282 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG); in adin_config_rgmii_mode() 328 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG); in adin_config_rmii_mode() 441 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_FLD_EN_REG); in adin_get_fast_down() 789 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset() 816 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1); in adin_read_mmd_stat_regs() 825 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg2); in adin_read_mmd_stat_regs() 933 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_cable_test_report_pair() 944 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_cable_test_report_pair() 980 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_CDIAG_RUN); in adin_cable_test_get_status()
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| A D | dp83869.c | 253 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_set_wol() 349 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_get_wol() 365 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 375 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 385 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 514 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_set_strapped_mode() 567 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_of_init() 831 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL); in dp83869_config_init()
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| A D | dp83tg720.c | 149 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_TDR_CFG); in dp83tg720_cable_test_get_status() 162 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83tg720_cable_test_get_status() 264 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TG720S_SQI_REG_1); in dp83tg720_get_sqi()
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| A D | microchip_t1.c | 1113 txc = phy_read_mmd(phydev, MDIO_MMD_VEND1, LAN887X_MIS_DLL_CFG_REG0); in lan887x_config_rgmii_en() 1171 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, LAN887X_EFUSE_READ_DAT9); in lan887x_config_phy_interface() 1444 val = phy_read_mmd(phydev, stat.mmd, stat.reg); in lan887x_get_stat() 1616 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_chk() 1663 gain_idx = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report() 1670 pos_peak = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report() 1677 neg_peak = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report() 1684 pos_peak_time = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report() 1691 neg_peak_time = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report() 1744 gain_idx_hybrid = phy_read_mmd(phydev, MDIO_MMD_VEND1, in lan887x_cable_test_report() [all …]
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| A D | microchip.c | 272 priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID); in lan88xx_probe() 273 priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV); in lan88xx_probe() 331 val = phy_read_mmd(phydev, MDIO_MMD_PCS, in lan88xx_config_init()
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| A D | micrel.c | 1054 newval = phy_read_mmd(phydev, 2, reg); in ksz9031_of_load_skew_values() 1094 reg = phy_read_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD); in ksz9031_enable_edpd() 1296 newval = phy_read_mmd(phydev, 2, reg); in ksz9131_of_load_skew_values() 1366 reg = phy_read_mmd(phydev, 2, 0); in ksz9131_led_errata() 4206 phy_read_mmd(phydev, 2, LAN8841_PTP_TX_MSG_HEADER2); in lan8841_ptp_flush_fifo() 4208 phy_read_mmd(phydev, 2, LAN8841_PTP_INT_STS); in lan8841_ptp_flush_fifo() 4234 tmp = phy_read_mmd(phydev, 2, LAN8841_PTP_GPIO_CAP_STS); in lan8841_gpio_process_cap() 4279 status = phy_read_mmd(phydev, 2, LAN8841_PTP_INT_STS); in lan8841_handle_ptp_interrupt() 4650 s = phy_read_mmd(phydev, 2, LAN8841_PTP_LTC_RD_SEC_HI); in lan8841_ptp_gettime64() 4679 s = phy_read_mmd(phydev, 2, LAN8841_PTP_LTC_RD_SEC_HI); in lan8841_ptp_getseconds() [all …]
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| /linux/drivers/net/phy/aquantia/ |
| A D | aquantia_main.c | 116 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat() 122 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat() 242 irq_status = phy_read_mmd(phydev, MDIO_MMD_AN, in aqr_handle_interrupt() 262 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr_read_status() 321 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); in aqr107_read_rate() 387 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV); in aqr107_get_downshift() 452 ret = read_poll_timeout(phy_read_mmd, val, val != 0, in aqr_wait_reset_complete() 470 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_GLOBAL_FW_ID); in aqr107_chip_info() 552 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr107_link_change_notify() 560 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT4); in aqr107_link_change_notify() [all …]
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| A D | aquantia_hwmon.c | 44 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_get() 70 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_test_bit()
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| /linux/drivers/net/phy/qcom/ |
| A D | qca807x.c | 264 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca807x_led_hw_control_get() 283 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca807x_led_hw_control_get() 374 val = phy_read_mmd(priv->phy, MDIO_MMD_AN, reg); in qca807x_gpio_get() 387 val = phy_read_mmd(priv->phy, MDIO_MMD_AN, reg); in qca807x_gpio_set() 772 control_dac = phy_read_mmd(phydev, MDIO_MMD_AN, in qca807x_config_init()
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| A D | qca808x.c | 163 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE); in qca808x_is_1g_only() 257 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in qca808x_read_status() 523 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca808x_led_hw_control_get()
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| A D | qcom-phy-lib.c | 536 val = phy_read_mmd(phydev, MDIO_MMD_PCS, cdt_length_reg); in qca808x_cdt_fault_length() 598 val = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA808X_MMD3_CDT_STATUS); in qca808x_cable_test_get_status() 635 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in qca808x_led_reg_hw_control_status()
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