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/linux/drivers/gpu/drm/udl/
A Dudl_transfer.c31 return (((pixel >> 3) & 0x001f) | in pixel32_to_be16()
32 ((pixel >> 5) & 0x07e0) | in pixel32_to_be16()
33 ((pixel >> 8) & 0xf800)); in pixel32_to_be16()
85 while ((pixel_end > pixel) && in udl_compress_hline16()
100 cmd_pixel_start = pixel; in udl_compress_hline16()
103 raw_pixel_start = pixel; in udl_compress_hline16()
118 pixel += bpp; in udl_compress_hline16()
124 pixel += bpp; in udl_compress_hline16()
136 raw_pixel_start = pixel; in udl_compress_hline16()
141 if (pixel > raw_pixel_start) { in udl_compress_hline16()
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/linux/drivers/video/fbdev/core/
A Dfb_draw.h26 pixel_to_pat( u32 bpp, u32 pixel) in pixel_to_pat() argument
30 return 0xfffffffffffffffful*pixel; in pixel_to_pat()
52 pixel_to_pat( u32 bpp, u32 pixel) in pixel_to_pat() argument
56 return 0xfffffffful*pixel; in pixel_to_pat()
58 return 0x55555555ul*pixel; in pixel_to_pat()
60 return 0x11111111ul*pixel; in pixel_to_pat()
62 return 0x01010101ul*pixel; in pixel_to_pat()
64 return 0x01001001ul*pixel; in pixel_to_pat()
66 return 0x00010001ul*pixel; in pixel_to_pat()
68 return 0x01000001ul*pixel; in pixel_to_pat()
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/linux/Documentation/devicetree/bindings/display/bridge/
A Dfsl,imx8qxp-pixel-link.yaml4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-link.yaml#
14 asynchronous linkage between pixel sources(display controller or
15 camera module) and pixel consumers(imaging or displays).
18 This binding documentation is only for pixel links whose pixel sources are
27 - fsl,imx8qm-dc-pixel-link
28 - fsl,imx8qxp-dc-pixel-link
68 const: fsl,imx8qxp-dc-pixel-link
78 const: fsl,imx8qm-dc-pixel-link
94 dc0-pixel-link0 {
95 compatible = "fsl,imx8qxp-dc-pixel-link";
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A Dfsl,imx8qxp-pixel-combiner.yaml4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pixel-combiner.yaml#
15 of modes(bypass, pixel combine, YUV444 to YUV422, split_RGB) configured as
16 either one screen, two screens, or virtual screens. The pixel combiner is
17 also responsible for generating some of the control signals for the pixel link
23 - fsl,imx8qm-pixel-combiner
24 - fsl,imx8qxp-pixel-combiner
47 description: Represents a display stream of pixel combiner.
92 pixel-combiner@56020000 {
93 compatible = "fsl,imx8qxp-pixel-combiner";
/linux/drivers/gpu/drm/bridge/imx/
A DKconfig32 Freescale i.MX8qm processor. Official name of LDB is pixel mapper.
42 Freescale i.MX8qxp processor. Official name of LDB is pixel mapper.
45 tristate "Freescale i.MX8QM/QXP pixel combiner"
50 Choose this to enable pixel combiner found in
54 tristate "Freescale i.MX8QM/QXP display pixel link"
59 Choose this to enable display pixel link found in
63 tristate "Freescale i.MX8QXP pixel link to display pixel interface"
67 Choose this to enable pixel link to display pixel interface(PXL2DPI)
/linux/drivers/staging/fbtft/
A Dfb_agm1264k-fl.c265 *write_pos = pixel; in iterate_diffusion_matrix()
296 u16 b = pixel & 0x1f; in write_vmem()
297 u16 g = (pixel & (0x3f << 5)) >> 5; in write_vmem()
301 if (pixel > 255) in write_vmem()
302 pixel = 255; in write_vmem()
312 signed short pixel = in write_vmem() local
314 signed short error_b = pixel - BLACK; in write_vmem()
315 signed short error_w = pixel - WHITE; in write_vmem()
322 pixel = 0xff; in write_vmem()
326 pixel = 0; in write_vmem()
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A Dfb_ssd1325.c61 static uint8_t rgb565_to_g16(u16 pixel) in rgb565_to_g16() argument
63 u16 b = pixel & 0x1f; in rgb565_to_g16()
64 u16 g = (pixel & (0x3f << 5)) >> 5; in rgb565_to_g16()
65 u16 r = (pixel & (0x1f << (5 + 6))) >> (5 + 6); in rgb565_to_g16()
67 pixel = (299 * r + 587 * g + 114 * b) / 195; in rgb565_to_g16()
68 if (pixel > 255) in rgb565_to_g16()
69 pixel = 255; in rgb565_to_g16()
70 return (uint8_t)pixel / 16; in rgb565_to_g16()
/linux/Documentation/devicetree/bindings/media/
A Dcdns,csi2rx.yaml14 lanes in input, and 4 different pixel streams in output.
31 - description: pixel Clock for Stream interface 0
32 - description: pixel Clock for Stream interface 1
33 - description: pixel Clock for Stream interface 2
34 - description: pixel Clock for Stream interface 3
49 - description: pixel reset for Stream interface 0
50 - description: pixel reset for Stream interface 1
51 - description: pixel reset for Stream interface 2
52 - description: pixel reset for Stream interface 3
/linux/Documentation/userspace-api/media/v4l/
A Dfourcc.rst3 Guidelines for Video4Linux pixel format 4CCs
8 the pixel format, compression and colour space. The interpretation of the
23 2nd character: pixel order
30 3rd character: uncompressed bits-per-pixel 0--9, A--
32 4th character: compressed bits-per-pixel 0--9, A--
A Dvidioc-enum-framesizes.rst30 that contains an index and pixel format and receives a frame width
37 and height in pixels) that the device supports for the given pixel
40 The supported pixel formats can be obtained by using the
99 - Width of the frame [pixel].
102 - Height of the frame [pixel].
114 - Minimum frame width [pixel].
117 - Maximum frame width [pixel].
120 - Frame width step size [pixel].
123 - Minimum frame height [pixel].
126 - Maximum frame height [pixel].
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A Dpixfmt-cnf4.rst9 Depth sensor confidence information as a 4 bits per pixel packed array
20 Bits 0-3 of byte n refer to confidence value of depth pixel 2*n,
21 bits 4-7 to confidence value of depth pixel 2*n+1.
A Dpixfmt-y12i.rst15 This is a grey-scale image with a depth of 12 bits per pixel, but with
16 pixels from 2 sources interleaved and bit-packed. Each pixel is stored
28 interleaved pixel.
/linux/Documentation/gpu/amdgpu/display/
A Ddisplay-manager.rst99 pixel color values and, therefore, the resulted pixel color. For
102 - *fg.rgb*: Each of the RGB component values from the foreground's pixel.
103 - *fg.alpha*: Alpha component value from the foreground's pixel.
113 alpha affects the resulted pixel color values.
117 * **None**: Blend formula that ignores the pixel alpha.
122 * **Coverage**: Blend formula that assumes the pixel color values were not
152 * *MPC pixel alpha* matches *DRM fg.alpha* as the alpha component value
153 from the plane's pixel
154 * *MPC global alpha* matches *DRM plane_alpha* when the pixel alpha should
155 be ignored and, therefore, pixel values are not pre-multiplied
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/linux/Documentation/devicetree/bindings/bus/
A Dfsl,imx8qxp-pixel-link-msi-bus.yaml4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml#
13 i.MX8qxp pixel link MSI bus is used to control settings of PHYs, I/Os
18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks,
29 pixel link MSI bus controller and does not allow SCFW user to control it.
43 - fsl,imx8qxp-display-pixel-link-msi-bus
44 - fsl,imx8qm-display-pixel-link-msi-bus
52 - fsl,imx8qxp-display-pixel-link-msi-bus
53 - fsl,imx8qm-display-pixel-link-msi-bus
94 compatible = "fsl,imx8qxp-display-pixel-link-msi-bus", "simple-pm-bus";
161 clock-names = "pixel", "bypass";
/linux/Documentation/devicetree/bindings/media/i2c/
A Daptina,mt9p031.yaml13 The Aptina MT9P031 is a 1/2.5-inch CMOS active pixel digital image sensor
60 pixel-clock-frequency:
63 description: Target pixel clock frequency
70 - pixel-clock-frequency
103 pixel-clock-frequency = <96000000>;
/linux/Documentation/devicetree/bindings/display/armada/
A Dmarvell,dove-lcd.txt13 "axiclk" - axi bus clock for pixel clock
14 "plldivider" - pll divider clock for pixel clock
15 "ext_ref_clk0" - external clock 0 for pixel clock
16 "ext_ref_clk1" - external clock 1 for pixel clock
/linux/Documentation/userspace-api/media/dvb/
A Dlegacy_dvb_osd.rst130 - | Sets all pixel to color 0.
139 - | Sets all pixel to color <color>.
153 | opacity=0: pixel opacity 0% (only video pixel shows)
155 | opacity=255: pixel opacity 100% (only OSD pixel shows)
170 255->pixel
178 - | Sets transparency of mixed pixel (0..15).
187 - | Sets pixel <x>,<y> to color number <color>.
196 - | Returns color number of pixel <x>,<y>, or -1.
206 | Returns 0 on success, -1 on clipping all pixel (no pixel
220 | Returns 0 on success, -1 on clipping all pixel.
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/linux/Documentation/devicetree/bindings/display/msm/
A Ddsi-controller-main.yaml68 - pixel:: Display pixel clock.
241 - const: pixel
260 - const: pixel
280 - const: pixel
300 - const: pixel
321 - const: pixel
340 - const: pixel
367 - const: pixel
391 - const: pixel
410 - const: pixel
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/linux/Documentation/fb/
A Dinternals.rst61 Each pixel is either black or white.
66 The whole pixel value is fed through a programmable lookup table that has one
67 color (including red, green, and blue intensities) for each possible pixel
73 The pixel value is broken up into red, green, and blue fields.
78 The pixel value is broken up into red, green, and blue fields, each of which
A Dpxafb.rst63 4 or 8 pixel monochrome single panel data
72 Double pixel clock. 1=>true, 0=>false
80 pixel clock polarity
112 bpp = 16 -- for YUV422 planar (1 pixel = 1 Y + 1/2 Cb + 1/2 Cr)
114 bpp = 12 -- for YUV420 planar (1 pixel = 1 Y + 1/4 Cb + 1/4 Cr)
123 with minimum bits per pixel, e.g. for YUV420, Cr component
124 for one pixel is actually 2-bits, it means the line length
/linux/drivers/video/fbdev/
A Dudlfb.c442 while ((pixel_end > pixel) && in dlfb_compress_hline()
450 *pixel == *(u16 *)((u8 *)pixel + back_buffer_offset)) { in dlfb_compress_hline()
451 pixel++; in dlfb_compress_hline()
464 cmd_pixel_start = pixel; in dlfb_compress_hline()
467 raw_pixel_start = pixel; in dlfb_compress_hline()
482 u16 pixel_value = *pixel; in dlfb_compress_hline()
488 pixel++; in dlfb_compress_hline()
499 pixel++; in dlfb_compress_hline()
501 (*pixel == pixel_value)); in dlfb_compress_hline()
507 raw_pixel_start = pixel; in dlfb_compress_hline()
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/linux/Documentation/userspace-api/
A Ddma-buf-alloc-exchange.rst5 Exchanging pixel buffers
9 support for sharing pixel-buffer allocations between processes, devices, and
49 pixel:
54 pixel data:
56 of a pixel or an image. The data for one pixel may be spread over several
68 pixel format:
69 A description of how pixel data represents the pixel's color and alpha
73 A description of how pixel data is laid out in memory buffers.
101 Each ``DRM_FORMAT_*`` token describes the translation between a pixel
118 sample is stored for each 2x2 pixel grouping).
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/linux/Documentation/driver-api/media/
A Dtx-rx.rst8 V4L2 supports various devices that transmit and receive pixel data. Examples of
41 Media bus pixel code
65 The pixel rate on the bus is calculated as follows::
71 .. list-table:: variables in pixel rate calculation
90 The pixel rate calculated this way is **not** the same thing as the
91 pixel rate on the camera sensor's pixel array which is indicated by the
92 :ref:`V4L2_CID_PIXEL_RATE <v4l2-cid-pixel-rate>` control.
/linux/Documentation/devicetree/bindings/display/
A Dbrcm,bcm2835-dpi.yaml22 - description: The pixel clock that feeds the pixelvalve
27 - const: pixel
52 clock-names = "core", "pixel";
/linux/Documentation/userspace-api/media/drivers/
A Dcamera-sensor.rst25 of cropping and scaling operations from the device's pixel array's size.
58 (analogue crop height + vertical blanking) / pixel rate
62 crop, use the full source image size, i.e. pixel array size.
66 is pixels and the unit of the ``V4L2_CID_VBLANK`` is lines. The pixel rate in
67 the sensor's **pixel array** is specified by ``V4L2_CID_PIXEL_RATE`` in the same
74 The first entity in the linear pipeline is the pixel array. The pixel array may

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