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Searched refs:pll_clk (Results 1 – 25 of 65) sorted by relevance

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/linux/drivers/clk/axs10x/
A Dpll_clock.c223 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in axs10x_pll_clk_probe()
224 if (!pll_clk) in axs10x_pll_clk_probe()
241 pll_clk->dev = dev; in axs10x_pll_clk_probe()
256 &pll_clk->hw); in axs10x_pll_clk_probe()
266 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in of_axs10x_pll_clk_setup()
267 if (!pll_clk) in of_axs10x_pll_clk_setup()
271 if (!pll_clk->base) { in of_axs10x_pll_clk_setup()
277 if (!pll_clk->lock) { in of_axs10x_pll_clk_setup()
307 iounmap(pll_clk->lock); in of_axs10x_pll_clk_setup()
309 iounmap(pll_clk->base); in of_axs10x_pll_clk_setup()
[all …]
A Di2s_pll_clock.c170 struct i2s_pll_clk *pll_clk; in i2s_pll_clk_probe() local
173 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in i2s_pll_clk_probe()
174 if (!pll_clk) in i2s_pll_clk_probe()
177 pll_clk->base = devm_platform_ioremap_resource(pdev, 0); in i2s_pll_clk_probe()
178 if (IS_ERR(pll_clk->base)) in i2s_pll_clk_probe()
179 return PTR_ERR(pll_clk->base); in i2s_pll_clk_probe()
188 pll_clk->hw.init = &init; in i2s_pll_clk_probe()
189 pll_clk->dev = dev; in i2s_pll_clk_probe()
191 clk = devm_clk_register(dev, &pll_clk->hw); in i2s_pll_clk_probe()
/linux/drivers/clk/socfpga/
A Dclk-pll-s10.c199 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in s10_register_pll()
200 if (WARN_ON(!pll_clk)) in s10_register_pll()
220 hw_clk = &pll_clk->hw.hw; in s10_register_pll()
224 kfree(pll_clk); in s10_register_pll()
239 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in agilex_register_pll()
240 if (WARN_ON(!pll_clk)) in agilex_register_pll()
259 hw_clk = &pll_clk->hw.hw; in agilex_register_pll()
263 kfree(pll_clk); in agilex_register_pll()
278 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in n5x_register_pll()
279 if (WARN_ON(!pll_clk)) in n5x_register_pll()
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A Dclk-pll.c78 struct socfpga_pll *pll_clk; in __socfpga_pll_init() local
87 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in __socfpga_pll_init()
88 if (WARN_ON(!pll_clk)) in __socfpga_pll_init()
95 pll_clk->hw.reg = clk_mgr_base_addr + reg; in __socfpga_pll_init()
105 pll_clk->hw.hw.init = &init; in __socfpga_pll_init()
107 pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA; in __socfpga_pll_init()
109 hw_clk = &pll_clk->hw.hw; in __socfpga_pll_init()
129 kfree(pll_clk); in __socfpga_pll_init()
A Dclk-pll-a10.c71 struct socfpga_pll *pll_clk; in __socfpga_pll_init() local
81 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in __socfpga_pll_init()
82 if (WARN_ON(!pll_clk)) in __socfpga_pll_init()
89 pll_clk->hw.reg = clk_mgr_a10_base_addr + reg; in __socfpga_pll_init()
102 pll_clk->hw.hw.init = &init; in __socfpga_pll_init()
104 pll_clk->hw.bit_idx = SOCFPGA_PLL_EXT_ENA; in __socfpga_pll_init()
105 hw_clk = &pll_clk->hw.hw; in __socfpga_pll_init()
125 kfree(pll_clk); in __socfpga_pll_init()
/linux/drivers/clk/
A Dclk-hsdk-pll.c312 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in hsdk_pll_clk_probe()
313 if (!pll_clk) in hsdk_pll_clk_probe()
331 pll_clk->hw.init = &init; in hsdk_pll_clk_probe()
332 pll_clk->dev = dev; in hsdk_pll_clk_probe()
347 &pll_clk->hw); in hsdk_pll_clk_probe()
358 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in of_hsdk_pll_clk_setup()
359 if (!pll_clk) in of_hsdk_pll_clk_setup()
363 if (!pll_clk->regs) { in of_hsdk_pll_clk_setup()
385 pll_clk->hw.init = &init; in of_hsdk_pll_clk_setup()
405 iounmap(pll_clk->regs); in of_hsdk_pll_clk_setup()
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A Dclk-moxart.c59 struct clk *pll_clk; in moxart_of_apb_clk_init() local
81 pll_clk = of_clk_get(node, 0); in moxart_of_apb_clk_init()
82 if (IS_ERR(pll_clk)) { in moxart_of_apb_clk_init()
A Dclk-vt8500.c677 struct clk_pll *pll_clk; in vtwm_pll_clk_init() local
690 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in vtwm_pll_clk_init()
691 if (WARN_ON(!pll_clk)) in vtwm_pll_clk_init()
694 pll_clk->reg = pmc_base + reg; in vtwm_pll_clk_init()
695 pll_clk->lock = &_lock; in vtwm_pll_clk_init()
696 pll_clk->type = pll_type; in vtwm_pll_clk_init()
707 pll_clk->hw.init = &init; in vtwm_pll_clk_init()
709 hw = &pll_clk->hw; in vtwm_pll_clk_init()
710 rc = clk_hw_register(NULL, &pll_clk->hw); in vtwm_pll_clk_init()
712 kfree(pll_clk); in vtwm_pll_clk_init()
/linux/drivers/clk/renesas/
A Drcar-gen4-cpg.c86 u32 cr0 = readl(pll_clk->pllcr0_reg); in cpg_pll_8_25_clk_recalc_rate()
105 u32 cr0 = readl(pll_clk->pllcr0_reg); in cpg_pll_8_25_clk_determine_rate()
139 u32 cr0 = readl(pll_clk->pllcr0_reg); in cpg_pll_8_25_clk_set_rate()
200 u32 cr0 = readl(pll_clk->pllcr0_reg); in cpg_pll_9_24_clk_recalc_rate()
234 struct cpg_pll_clk *pll_clk; in cpg_pll_clk_register() local
237 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in cpg_pll_clk_register()
238 if (!pll_clk) in cpg_pll_clk_register()
246 pll_clk->hw.init = &init; in cpg_pll_clk_register()
249 pll_clk->pllecr_reg = base + CPG_PLLECR; in cpg_pll_clk_register()
252 clk = clk_register(NULL, &pll_clk->hw); in cpg_pll_clk_register()
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A Drcar-gen3-cpg.c95 val = readl(pll_clk->pllcr_reg); in cpg_pll_clk_set_rate()
98 writel(val, pll_clk->pllcr_reg); in cpg_pll_clk_set_rate()
101 if (readl(pll_clk->pllecr_reg) & pll_clk->pllecr_pllst_mask) in cpg_pll_clk_set_rate()
124 struct cpg_pll_clk *pll_clk; in cpg_pll_clk_register() local
128 pll_clk = kzalloc(sizeof(*pll_clk), GFP_KERNEL); in cpg_pll_clk_register()
129 if (!pll_clk) in cpg_pll_clk_register()
137 pll_clk->hw.init = &init; in cpg_pll_clk_register()
138 pll_clk->pllcr_reg = base + offset; in cpg_pll_clk_register()
139 pll_clk->pllecr_reg = base + CPG_PLLECR; in cpg_pll_clk_register()
143 clk = clk_register(NULL, &pll_clk->hw); in cpg_pll_clk_register()
[all …]
A Drzv2h-cpg.c86 struct pll_clk { struct
135 struct pll_clk *pll_clk = to_pll(hw); in rzv2h_cpg_pll_clk_recalc_rate() local
166 struct pll_clk *pll_clk; in rzv2h_cpg_pll_clk_register() local
173 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in rzv2h_cpg_pll_clk_register()
174 if (!pll_clk) in rzv2h_cpg_pll_clk_register()
184 pll_clk->hw.init = &init; in rzv2h_cpg_pll_clk_register()
185 pll_clk->conf = core->cfg.conf; in rzv2h_cpg_pll_clk_register()
186 pll_clk->base = base; in rzv2h_cpg_pll_clk_register()
187 pll_clk->priv = priv; in rzv2h_cpg_pll_clk_register()
188 pll_clk->type = core->type; in rzv2h_cpg_pll_clk_register()
[all …]
A Drzg2l-cpg.c943 struct pll_clk { struct
956 struct pll_clk *pll_clk = to_pll(hw); in rzg2l_cpg_pll_clk_recalc_rate() local
980 struct pll_clk *pll_clk = to_pll(hw); in rzg3s_cpg_pll_clk_recalc_rate() local
1017 struct pll_clk *pll_clk; in rzg2l_cpg_pll_clk_register() local
1024 pll_clk = devm_kzalloc(dev, sizeof(*pll_clk), GFP_KERNEL); in rzg2l_cpg_pll_clk_register()
1025 if (!pll_clk) in rzg2l_cpg_pll_clk_register()
1035 pll_clk->hw.init = &init; in rzg2l_cpg_pll_clk_register()
1036 pll_clk->conf = core->conf; in rzg2l_cpg_pll_clk_register()
1037 pll_clk->base = priv->base; in rzg2l_cpg_pll_clk_register()
1038 pll_clk->priv = priv; in rzg2l_cpg_pll_clk_register()
[all …]
/linux/arch/sh/kernel/cpu/sh2a/
A Dclock-sh7269.c47 static struct clk pll_clk = { variable
64 .parent = &pll_clk,
79 .parent = &pll_clk,
86 &pll_clk,
106 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
142 CLKDEV_CON_ID("pll_clk", &pll_clk),
A Dclock-sh7264.c51 static struct clk pll_clk = { variable
60 &pll_clk,
78 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
108 CLKDEV_CON_ID("pll_clk", &pll_clk),
/linux/drivers/spi/
A Dspi-bcmbca-hsspi.c117 struct clk *pll_clk; member
439 struct clk *clk, *pll_clk = NULL; in bcmbca_hsspi_probe() local
467 if (IS_ERR(pll_clk)) { in bcmbca_hsspi_probe()
468 ret = PTR_ERR(pll_clk); in bcmbca_hsspi_probe()
472 ret = clk_prepare_enable(pll_clk); in bcmbca_hsspi_probe()
476 rate = clk_get_rate(pll_clk); in bcmbca_hsspi_probe()
492 bs->pll_clk = pll_clk; in bcmbca_hsspi_probe()
564 clk_disable_unprepare(pll_clk); in bcmbca_hsspi_probe()
577 clk_disable_unprepare(bs->pll_clk); in bcmbca_hsspi_remove()
589 clk_disable_unprepare(bs->pll_clk); in bcmbca_hsspi_suspend()
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A Dspi-bcm63xx-hsspi.c136 struct clk *pll_clk; member
730 struct clk *clk, *pll_clk = NULL; in bcm63xx_hsspi_probe() local
766 if (IS_ERR(pll_clk)) { in bcm63xx_hsspi_probe()
767 ret = PTR_ERR(pll_clk); in bcm63xx_hsspi_probe()
771 ret = clk_prepare_enable(pll_clk); in bcm63xx_hsspi_probe()
775 rate = clk_get_rate(pll_clk); in bcm63xx_hsspi_probe()
791 bs->pll_clk = pll_clk; in bcm63xx_hsspi_probe()
874 clk_disable_unprepare(pll_clk); in bcm63xx_hsspi_probe()
888 clk_disable_unprepare(bs->pll_clk); in bcm63xx_hsspi_remove()
900 clk_disable_unprepare(bs->pll_clk); in bcm63xx_hsspi_suspend()
[all …]
/linux/arch/sh/kernel/cpu/sh4a/
A Dclock-sh7722.c82 static struct clk pll_clk = { variable
91 &pll_clk,
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
138 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
174 CLKDEV_CON_ID("pll_clk", &pll_clk),
226 pll_clk.parent = &dll_clk; in arch_clk_init()
228 pll_clk.parent = &extal_clk; in arch_clk_init()
A Dclock-sh7366.c79 static struct clk pll_clk = { variable
88 &pll_clk,
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
125 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
188 CLKDEV_CON_ID("pll_clk", &pll_clk),
251 pll_clk.parent = &dll_clk; in arch_clk_init()
253 pll_clk.parent = &extal_clk; in arch_clk_init()
A Dclock-sh7757.c37 static struct clk pll_clk = { variable
45 &pll_clk,
63 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
105 CLKDEV_CON_ID("pll_clk", &pll_clk),
A Dclock-shx3.c36 static struct clk pll_clk = { variable
44 &pll_clk,
62 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
103 CLKDEV_CON_ID("pll_clk", &pll_clk),
A Dclock-sh7343.c76 static struct clk pll_clk = { variable
85 &pll_clk,
106 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
122 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
190 CLKDEV_CON_ID("pll_clk", &pll_clk),
258 pll_clk.parent = &dll_clk; in arch_clk_init()
260 pll_clk.parent = &extal_clk; in arch_clk_init()
A Dclock-sh7723.c83 static struct clk pll_clk = { variable
92 &pll_clk,
112 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
138 [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
199 CLKDEV_CON_ID("pll_clk", &pll_clk),
274 pll_clk.parent = &dll_clk; in arch_clk_init()
276 pll_clk.parent = &extal_clk; in arch_clk_init()
A Dclock-sh7785.c40 static struct clk pll_clk = { variable
48 &pll_clk,
67 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
119 CLKDEV_CON_ID("pll_clk", &pll_clk),
A Dclock-sh7724.c85 static struct clk pll_clk = { variable
102 .parent = &pll_clk,
119 &pll_clk,
151 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
264 CLKDEV_CON_ID("pll_clk", &pll_clk),
348 pll_clk.parent = &fll_clk; in arch_clk_init()
350 pll_clk.parent = &extal_clk; in arch_clk_init()
/linux/drivers/clk/imx/
A Dclk-fracn-gppll.c350 const struct imx_fracn_gppll_clk *pll_clk, in _imx_clk_fracn_gppll() argument
363 init.flags = pll_clk->flags; in _imx_clk_fracn_gppll()
370 pll->rate_table = pll_clk->rate_table; in _imx_clk_fracn_gppll()
371 pll->rate_count = pll_clk->rate_count; in _imx_clk_fracn_gppll()
387 const struct imx_fracn_gppll_clk *pll_clk) in imx_clk_fracn_gppll() argument
389 return _imx_clk_fracn_gppll(name, parent_name, base, pll_clk, CLK_FRACN_GPPLL_FRACN); in imx_clk_fracn_gppll()
395 const struct imx_fracn_gppll_clk *pll_clk) in imx_clk_fracn_gppll_integer() argument
397 return _imx_clk_fracn_gppll(name, parent_name, base, pll_clk, CLK_FRACN_GPPLL_INTEGER); in imx_clk_fracn_gppll_integer()

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