| /linux/drivers/clk/ingenic/ |
| A D | cgu.c | 95 m = (ctl >> pll_info->m_shift) & GENMASK(pll_info->m_bits - 1, 0); in ingenic_pll_recalc_rate()
97 n = (ctl >> pll_info->n_shift) & GENMASK(pll_info->n_bits - 1, 0); in ingenic_pll_recalc_rate()
162 (*pll_info->calc_m_n_od)(pll_info, rate, parent_rate, &m, &n, &od); in ingenic_pll_calc()
222 ctl &= ~(GENMASK(pll_info->m_bits - 1, 0) << pll_info->m_shift); in ingenic_pll_set_rate()
223 ctl |= (m - pll_info->m_offset) << pll_info->m_shift; in ingenic_pll_set_rate()
225 ctl &= ~(GENMASK(pll_info->n_bits - 1, 0) << pll_info->n_shift); in ingenic_pll_set_rate()
226 ctl |= (n - pll_info->n_offset) << pll_info->n_shift; in ingenic_pll_set_rate()
229 ctl &= ~(GENMASK(pll_info->od_bits - 1, 0) << pll_info->od_shift); in ingenic_pll_set_rate()
230 ctl |= pll_info->od_encoding[od - 1] << pll_info->od_shift; in ingenic_pll_set_rate()
236 pll_info->set_rate_hook(pll_info, rate, parent_rate); in ingenic_pll_set_rate()
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| A D | cgu.h | 63 void (*calc_m_n_od)(const struct ingenic_cgu_pll_info *pll_info,
66 void (*set_rate_hook)(const struct ingenic_cgu_pll_info *pll_info,
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| A D | x1000-cgu.c | 173 x1000_i2spll_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in x1000_i2spll_calc_m_n_od() argument
177 const unsigned long m_max = GENMASK(pll_info->m_bits - 1, 0); in x1000_i2spll_calc_m_n_od()
178 const unsigned long n_max = GENMASK(pll_info->n_bits - 1, 0); in x1000_i2spll_calc_m_n_od()
193 x1000_i2spll_set_rate_hook(const struct ingenic_cgu_pll_info *pll_info, in x1000_i2spll_set_rate_hook() argument
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| A D | jz4760-cgu.c | 57 jz4760_cgu_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in jz4760_cgu_calc_m_n_od() argument
61 unsigned int m, n, od, m_max = (1 << pll_info->m_bits) - 1; in jz4760_cgu_calc_m_n_od()
67 n = clamp_val(n, 2, 1 << pll_info->n_bits); in jz4760_cgu_calc_m_n_od()
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| /linux/drivers/clk/baikal-t1/ |
| A D | clk-ccu-pll.c | 45 #define CCU_PLL_NUM ARRAY_SIZE(pll_info)
65 static const struct ccu_pll_info pll_info[] = { variable
92 if (pll_info[idx].id == clk_id) in ccu_pll_find_desc()
153 const struct ccu_pll_info *info = &pll_info[idx]; in ccu_pll_clk_register()
186 if (!!(pll_info[idx].features & CCU_PLL_BASIC) ^ defer) in ccu_pll_clk_register()
201 if (!!(pll_info[idx].features & CCU_PLL_BASIC) ^ defer) in ccu_pll_clk_unregister()
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| /linux/drivers/clk/visconti/ |
| A D | pll-tmpv770x.c | 53 static const struct visconti_pll_info pll_info[] __initconst = { variable
82 visconti_register_plls(ctx, pll_info, ARRAY_SIZE(pll_info), &tmpv770x_pll_lock); in tmpv770x_setup_plls()
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| /linux/drivers/gpu/drm/radeon/ |
| A D | radeon_combios.c | 717 uint16_t pll_info; in radeon_combios_get_clock_info() local
726 if (pll_info) { in radeon_combios_get_clock_info()
727 rev = RBIOS8(pll_info); in radeon_combios_get_clock_info()
749 spll->pll_out_min = RBIOS32(pll_info + 0x1e); in radeon_combios_get_clock_info()
750 spll->pll_out_max = RBIOS32(pll_info + 0x22); in radeon_combios_get_clock_info()
753 spll->pll_in_min = RBIOS32(pll_info + 0x48); in radeon_combios_get_clock_info()
754 spll->pll_in_max = RBIOS32(pll_info + 0x4c); in radeon_combios_get_clock_info()
764 mpll->pll_out_min = RBIOS32(pll_info + 0x2a); in radeon_combios_get_clock_info()
777 sclk = RBIOS16(pll_info + 0xa); in radeon_combios_get_clock_info()
778 mclk = RBIOS16(pll_info + 0x8); in radeon_combios_get_clock_info()
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_audio.c | 1043 const struct audio_pll_info *pll_info, in get_azalia_clock_info_dp() argument
1058 pll_info->audio_dto_source_clock_in_khz * 10; in get_azalia_clock_info_dp()
1065 const struct audio_pll_info *pll_info) in dce_aud_wall_dto_setup() argument
1101 src_sel = pll_info->dto_source - DTO_SOURCE_ID0; in dce_aud_wall_dto_setup()
1123 pll_info, in dce_aud_wall_dto_setup()
1157 const struct audio_pll_info *pll_info) in dce60_aud_wall_dto_setup() argument
1193 src_sel = pll_info->dto_source - DTO_SOURCE_ID0; in dce60_aud_wall_dto_setup()
1215 pll_info, in dce60_aud_wall_dto_setup()
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| A D | dce_clock_source.c | 1603 calc_pll_cs->ref_freq_khz = fw_info->pll_info.crystal_frequency; in calc_pll_max_vco_construct()
1605 fw_info->pll_info.min_output_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1607 fw_info->pll_info.max_output_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1614 fw_info->pll_info.max_input_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1621 fw_info->pll_info.min_input_pxl_clk_pll_frequency; in calc_pll_max_vco_construct()
1730 clk_src->ref_freq_khz = clk_src->bios->fw_info.pll_info.crystal_frequency; in dce110_clk_src_construct()
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| A D | dce_audio.h | 180 const struct audio_pll_info *pll_info);
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| A D | dce_i2c_hw.c | 624 dce_i2c_hw->reference_frequency = (ctx->dc_bios->fw_info.pll_info.crystal_frequency) >> 1; in dce_i2c_hw_construct()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | audio.h | 54 const struct audio_pll_info *pll_info);
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| A D | bios_parser.c | 437 info->pll_info.crystal_frequency = in get_firmware_info_v1_4()
439 info->pll_info.min_input_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
441 info->pll_info.max_input_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
443 info->pll_info.min_output_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
445 info->pll_info.max_output_pxl_clk_pll_frequency = in get_firmware_info_v1_4()
488 info->pll_info.crystal_frequency = in get_firmware_info_v2_1()
490 info->pll_info.min_input_pxl_clk_pll_frequency = in get_firmware_info_v2_1()
492 info->pll_info.max_input_pxl_clk_pll_frequency = in get_firmware_info_v2_1()
574 info->pll_info.crystal_frequency = in get_firmware_info_v2_2()
576 info->pll_info.min_input_pxl_clk_pll_frequency = in get_firmware_info_v2_2()
[all …]
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| A D | bios_parser2.c | 1803 info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10; in get_firmware_info_v3_1()
1806 if (info->pll_info.crystal_frequency == 0) in get_firmware_info_v3_1()
1807 info->pll_info.crystal_frequency = 27000; in get_firmware_info_v3_1()
1880 info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10; in get_firmware_info_v3_2()
1882 if (info->pll_info.crystal_frequency == 0) { in get_firmware_info_v3_2()
1884 info->pll_info.crystal_frequency = 27000; in get_firmware_info_v3_2()
1886 info->pll_info.crystal_frequency = 100000; in get_firmware_info_v3_2()
1953 info->pll_info.crystal_frequency = dce_info_v4_5->dce_refclk_10khz * 10; in get_firmware_info_v3_4()
1969 info->pll_info.crystal_frequency = dce_info_v4_4->dce_refclk_10khz * 10; in get_firmware_info_v3_4()
1986 info->pll_info.crystal_frequency = dce_info_v4_1->dce_refclk_10khz * 10; in get_firmware_info_v3_4()
[all …]
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| /linux/drivers/gpu/drm/amd/display/include/ |
| A D | audio_types.h | 114 struct audio_pll_info pll_info; member
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| A D | grph_object_ctrl_defs.h | 159 struct pll_info { struct
165 } pll_info; member
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| /linux/drivers/video/fbdev/aty/ |
| A D | atyfb.h | 49 struct pll_info { struct
140 struct pll_info pll_limits;
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| A D | radeonfb.h | 138 struct pll_info { struct
342 struct pll_info pll;
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| /linux/drivers/gpu/drm/renesas/rcar-du/ |
| A D | rcar_lvds.c | 132 struct pll_info { struct
142 unsigned long target, struct pll_info *pll, in rcar_lvds_d3_e3_pll_calc() argument
275 struct pll_info pll = { .diff = (unsigned long)-1 }; in rcar_lvds_pll_setup_d3_e3()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| A D | dcn201_hwseq.c | 241 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn201_init_hw()
245 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn201_init_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| A D | dce110_hwseq.c | 1444 audio_output->pll_info.audio_dto_source_clock_in_khz = in build_audio_output()
1449 audio_output->pll_info.feed_back_divider = in build_audio_output()
1452 audio_output->pll_info.dto_source = in build_audio_output()
1457 audio_output->pll_info.ss_enabled = true; in build_audio_output()
1459 audio_output->pll_info.ss_percentage = in build_audio_output()
2370 &audio_output.pll_info); in dce110_setup_audio_dto()
2376 &audio_output.pll_info); in dce110_setup_audio_dto()
2404 &audio_output.pll_info); in dce110_setup_audio_dto()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| A D | dcn31_hwseq.c | 133 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn31_init_hw()
138 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn31_init_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn401/ |
| A D | dcn401_fpu.c | 169 …dc->dml2_options.bbox_overrides.xtalclk_mhz = dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency… in dcn401_update_bw_bounding_box_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| A D | dcn30_hwseq.c | 664 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn30_init_hw()
669 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn30_init_hw()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| A D | dcn35_hwseq.c | 158 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency; in dcn35_init_hw()
163 dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency, in dcn35_init_hw()
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