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Searched refs:pll_syn (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/clk/sophgo/
A Dclk-cv18xx-pll.c193 return cv1800_clk_checkbit(&pll->common, &pll->pll_syn->en); in fpll_is_factional_mode()
231 syn_set = readl(pll->common.base + pll->pll_syn->set); in fpll_recalc_rate()
237 &pll->pll_syn->clk_half); in fpll_recalc_rate()
295 &pll->pll_syn->clk_half); in fpll_find_rate()
371 writel(detected_ssc, pll->common.base + pll->pll_syn->set); in fpll_set_rate()
401 cv1800_clk_setbit(&pll->common, &pll->pll_syn->en); in fpll_set_parent()
403 cv1800_clk_clearbit(&pll->common, &pll->pll_syn->en); in fpll_set_parent()
A Dclk-cv18xx-pll.h78 struct cv1800_clk_pll_synthesizer *pll_syn; member
95 .pll_syn = NULL, \
112 .pll_syn = _pll_syn, \

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