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Searched refs:psr_context (Results 1 – 11 of 11) sorted by relevance

/linux/drivers/gpu/drm/amd/display/dc/dce/
A Ddce_dmcu.c170 struct psr_context *psr_context) in dce_dmcu_setup_psr() argument
192 switch (psr_context->controllerId) { in dce_dmcu_setup_psr()
242 psr_context->rfb_update_auto_en; in dce_dmcu_setup_psr()
257 psr_context->skipPsrWaitForPllLock; in dce_dmcu_setup_psr()
261 psr_context->numberOfControllers; in dce_dmcu_setup_psr()
601 struct psr_context *psr_context) in dcn10_dmcu_setup_psr() argument
627 switch (psr_context->controllerId) { in dcn10_dmcu_setup_psr()
667 if (psr_context->allow_smu_optimizations) in dcn10_dmcu_setup_psr()
680 psr_context->rfb_update_auto_en; in dcn10_dmcu_setup_psr()
696 psr_context->skipPsrWaitForPllLock; in dcn10_dmcu_setup_psr()
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A Ddmub_psr.c294 struct psr_context *psr_context, in dmub_psr_copy_settings() argument
324 psr_context->psrExitLinkTrainingRequired); in dmub_psr_copy_settings()
328 psr_context->sdpTransmitLineNumDeadline); in dmub_psr_copy_settings()
336 copy_settings_data->dpphy_inst = psr_context->transmitterId; in dmub_psr_copy_settings()
337 copy_settings_data->aux_inst = psr_context->channel; in dmub_psr_copy_settings()
338 copy_settings_data->digfe_inst = psr_context->engineId; in dmub_psr_copy_settings()
339 copy_settings_data->digbe_inst = psr_context->transmitterId; in dmub_psr_copy_settings()
358 copy_settings_data->psr_level = psr_context->psr_level.u32all; in dmub_psr_copy_settings()
361 copy_settings_data->frame_delay = psr_context->frame_delay; in dmub_psr_copy_settings()
370 if (psr_context->su_granularity_required == 0) in dmub_psr_copy_settings()
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A Ddmub_psr.h41 struct psr_context *psr_context, uint8_t panel_inst);
/linux/drivers/gpu/drm/amd/display/dc/link/protocols/
A Dlink_edp_panel_control.c661 struct psr_context *psr_context) in edp_setup_psr() argument
726 psr_context->su_granularity_required = in edp_setup_psr()
728 psr_context->su_y_granularity = in edp_setup_psr()
753 psr_context->controllerId = in edp_setup_psr()
761 psr_context->phyType = PHY_TYPE_UNIPHY; in edp_setup_psr()
781 psr_context->numberOfControllers = in edp_setup_psr()
787 psr_context->timehyst_frames = 2; in edp_setup_psr()
792 psr_context->aux_repeats = 10; in edp_setup_psr()
794 psr_context->psr_level.u32all = 0; in edp_setup_psr()
831 psr_context->frame_delay = 0; in edp_setup_psr()
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A Dlink_edp_panel_control.h51 struct psr_context *psr_context);
/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
A Ddmcu.h68 struct psr_context *psr_context);
/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
A Damdgpu_dm_psr.c109 struct psr_context psr_context = {0}; in amdgpu_dm_link_setup_psr() local
132 ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context); in amdgpu_dm_link_setup_psr()
/linux/drivers/gpu/drm/amd/display/dc/core/
A Ddc_link_exports.c468 struct psr_context *psr_context) in dc_link_setup_psr() argument
470 return link->dc->link_srv->edp_setup_psr(link, stream, psr_config, psr_context); in dc_link_setup_psr()
/linux/drivers/gpu/drm/amd/display/dc/inc/
A Dlink.h269 struct psr_context *psr_context);
/linux/drivers/gpu/drm/amd/display/dc/
A Ddc_types.h655 struct psr_context { struct
A Ddc.h2230 struct psr_context *psr_context);

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