| /linux/drivers/gpu/drm/i915/soc/ |
| A D | intel_dram.c | 17 u8 width, ranks; member
22 u8 ranks; member
324 dimm->ranks = icl_get_dimm_ranks(val); in skl_dram_get_dimm_info()
352 if (ch->dimm_l.ranks == 2 || ch->dimm_s.ranks == 2) in skl_dram_get_channel_info()
353 ch->ranks = 2; in skl_dram_get_channel_info()
354 else if (ch->dimm_l.ranks == 1 && ch->dimm_s.ranks == 1) in skl_dram_get_channel_info()
355 ch->ranks = 2; in skl_dram_get_channel_info()
357 ch->ranks = 1; in skl_dram_get_channel_info()
402 if (ch0.ranks == 0 && ch1.ranks == 0) { in skl_dram_get_channels_info()
526 dimm->ranks = bxt_get_dimm_ranks(val); in bxt_get_dimm_info()
[all …]
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| /linux/Documentation/devicetree/bindings/memory-controllers/ddr/ |
| A D | jedec,lpddr-channel.yaml | 13 amount of individual LPDDR chips and the ranks per chip.
54 Each physical LPDDR chip may have one or more ranks. Ranks are
57 state of the CS pins. Different ranks may have different densities and
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| /linux/drivers/edac/ |
| A D | skx_common.c | 355 int banks, ranks, rows, cols, npages; in skx_get_dimm_info() local
359 ranks = numrank(mtr); in skx_get_dimm_info()
377 size = ((1ull << (rows + cols + ranks)) * banks) >> (20 - 3); in skx_get_dimm_info()
382 banks, 1 << ranks, rows, cols); in skx_get_dimm_info()
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| A D | sb_edac.c | 338 u32 ranks; member
701 int ranks = (1 << RANK_CNT_BITS(mtr)); in numrank() local
707 if (ranks > max) { in numrank()
709 ranks, max, (unsigned int)RANK_CNT_BITS(mtr), mtr); in numrank()
713 return ranks; in numrank()
1595 unsigned int i, j, banks, ranks, rows, cols, npages; in __populate_dimms() local
1649 ranks = numrank(pvt->info.type, mtr); in __populate_dimms()
1655 ((u64) cols * ranks * banks * 8); in __populate_dimms()
1661 size = ((u64)rows * cols * banks * ranks) >> (20 - 3); in __populate_dimms()
1667 banks, ranks, rows, cols); in __populate_dimms()
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| A D | i7core_edac.c | 411 static const int ranks[] = { 1, 2, 4, -EINVAL }; in numrank() local
413 return ranks[rank & 0x3]; in numrank()
582 u32 banks, ranks, rows, cols; in get_dimm_config() local
590 ranks = numrank(MC_DOD_NUMRANK(dimm_dod[j])); in get_dimm_config()
595 size = (rows * cols * banks * ranks) >> (20 - 3); in get_dimm_config()
600 banks, ranks, rows, cols); in get_dimm_config()
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| /linux/Documentation/driver-api/ |
| A D | edac.rst | 69 This is the name of the DRAM signal used to select the DRAM ranks to be
201 HBM2e (2GB) channel (equivalent to 8 X 2GB ranks). This creates a total
277 │ ├── rank 31 # total 32 ranks/dimms from 4 UMCs
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| /linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
| A D | fb.h | 147 int ranks; member
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| A D | ramnv50.c | 575 ram->ranks = (nvkm_rd32(device, 0x100200) & 0x4) ? 2 : 1; in nv50_ram_ctor()
623 if (ram->base.ranks > 1) { in nv50_ram_new()
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| A D | ramgt215.c | 990 if (ram->base.ranks > 1) { in gt215_ram_new()
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| /linux/Documentation/admin-guide/perf/ |
| A D | alibaba_pmu.rst | 32 selected rank, or four ranks separately in the first 4 counters. The base
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| /linux/Documentation/admin-guide/mm/ |
| A D | multigen_lru.rst | 134 certain time interval to create new generations, and it ranks the
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| /linux/Documentation/filesystems/ |
| A D | directory-locking.rst | 126 ones - in these terms overlayfs ranks lower than its layers, network
127 filesystem ranks lower than whatever it caches on, etc.)
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| A D | porting.rst | 1053 Lock ordering has been changed so that s_umount ranks above open_mutex again.
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| /linux/drivers/net/ethernet/qlogic/netxen/ |
| A D | netxen_nic_main.c | 2969 u8 dw, rows, cols, banks, ranks; in netxen_sysfs_read_dimm() local
2989 ranks = NETXEN_DIMM_NUMRANKS(val); in netxen_sysfs_read_dimm()
3041 ranks += 1; in netxen_sysfs_read_dimm()
3073 dimm.size = ((1 << rows) * (1 << cols) * dw * banks * ranks) / 8; in netxen_sysfs_read_dimm()
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| /linux/Documentation/admin-guide/RAS/ |
| A D | main.rst | 1018 Ch0 phy rd0, wr0 (0x063f4031): 2 ranks, UDIMMs
1021 Ch1 phy rd1, wr1 (0x063f4031): 2 ranks, UDIMMs
1023 Ch2 phy rd3, wr3 (0x063f4031): 2 ranks, UDIMMs
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