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Searched refs:ras_block (Results 1 – 25 of 50) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_nbio.c34 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_nbio_ras_sw_init()
40 strcpy(ras->ras_block.ras_comm.name, "pcie_bif"); in amdgpu_nbio_ras_sw_init()
41 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__PCIE_BIF; in amdgpu_nbio_ras_sw_init()
42 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_nbio_ras_sw_init()
43 adev->nbio.ras_if = &ras->ras_block.ras_comm; in amdgpu_nbio_ras_sw_init()
56 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_nbio_ras_late_init() argument
59 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_nbio_ras_late_init()
63 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_nbio_ras_late_init()
74 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_nbio_ras_late_init()
A Damdgpu_umc.c109 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_handle_bad_pages()
113 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_handle_bad_pages()
299 strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc"); in amdgpu_umc_ras_sw_init()
300 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC; in amdgpu_umc_ras_sw_init()
302 adev->umc.ras_if = &ras->ras_block.ras_comm; in amdgpu_umc_ras_sw_init()
304 if (!ras->ras_block.ras_late_init) in amdgpu_umc_ras_sw_init()
307 if (!ras->ras_block.ras_cb) in amdgpu_umc_ras_sw_init()
308 ras->ras_block.ras_cb = amdgpu_umc_process_ras_data_cb; in amdgpu_umc_ras_sw_init()
317 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_umc_ras_late_init()
321 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_umc_ras_late_init()
[all …]
A Damdgpu_hdp.c35 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_hdp_ras_sw_init()
41 strcpy(ras->ras_block.ras_comm.name, "hdp"); in amdgpu_hdp_ras_sw_init()
42 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__HDP; in amdgpu_hdp_ras_sw_init()
43 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_hdp_ras_sw_init()
44 adev->hdp.ras_if = &ras->ras_block.ras_comm; in amdgpu_hdp_ras_sw_init()
A Damdgpu_mmhub.c33 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_mmhub_ras_sw_init()
39 strcpy(ras->ras_block.ras_comm.name, "mmhub"); in amdgpu_mmhub_ras_sw_init()
40 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MMHUB; in amdgpu_mmhub_ras_sw_init()
41 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_mmhub_ras_sw_init()
42 adev->mmhub.ras_if = &ras->ras_block.ras_comm; in amdgpu_mmhub_ras_sw_init()
A Damdgpu_sdma.c99 struct ras_common_if *ras_block) in amdgpu_sdma_ras_late_init() argument
103 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_sdma_ras_late_init()
107 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_sdma_ras_late_init()
119 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_sdma_ras_late_init()
331 strcpy(ras->ras_block.ras_comm.name, "sdma"); in amdgpu_sdma_ras_sw_init()
332 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__SDMA; in amdgpu_sdma_ras_sw_init()
334 adev->sdma.ras_if = &ras->ras_block.ras_comm; in amdgpu_sdma_ras_sw_init()
337 if (!ras->ras_block.ras_late_init) in amdgpu_sdma_ras_sw_init()
338 ras->ras_block.ras_late_init = amdgpu_sdma_ras_late_init; in amdgpu_sdma_ras_sw_init()
341 if (!ras->ras_block.ras_cb) in amdgpu_sdma_ras_sw_init()
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A Damdgpu_jpeg.c281 int amdgpu_jpeg_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_jpeg_ras_late_init() argument
285 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_jpeg_ras_late_init()
289 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_jpeg_ras_late_init()
303 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_jpeg_ras_late_init()
316 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_jpeg_ras_sw_init()
322 strcpy(ras->ras_block.ras_comm.name, "jpeg"); in amdgpu_jpeg_ras_sw_init()
323 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__JPEG; in amdgpu_jpeg_ras_sw_init()
324 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON; in amdgpu_jpeg_ras_sw_init()
325 adev->jpeg.ras_if = &ras->ras_block.ras_comm; in amdgpu_jpeg_ras_sw_init()
327 if (!ras->ras_block.ras_late_init) in amdgpu_jpeg_ras_sw_init()
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A Damdgpu_mca.c94 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_mca_mp0_ras_sw_init()
100 strcpy(ras->ras_block.ras_comm.name, "mca.mp0"); in amdgpu_mca_mp0_ras_sw_init()
101 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mp0_ras_sw_init()
103 adev->mca.mp0.ras_if = &ras->ras_block.ras_comm; in amdgpu_mca_mp0_ras_sw_init()
118 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_mca_mp1_ras_sw_init()
124 strcpy(ras->ras_block.ras_comm.name, "mca.mp1"); in amdgpu_mca_mp1_ras_sw_init()
125 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mp1_ras_sw_init()
127 adev->mca.mp1.ras_if = &ras->ras_block.ras_comm; in amdgpu_mca_mp1_ras_sw_init()
148 strcpy(ras->ras_block.ras_comm.name, "mca.mpio"); in amdgpu_mca_mpio_ras_sw_init()
149 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mpio_ras_sw_init()
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A Dmca_v3_0.c60 .ras_block = {
80 .ras_block = {
100 .ras_block = {
A Daldebaran.c361 tmp_adev->sdma.ras->ras_block.ras_late_init) { in aldebaran_mode2_restore_hwcontext()
362 r = tmp_adev->sdma.ras->ras_block.ras_late_init(tmp_adev, in aldebaran_mode2_restore_hwcontext()
363 &tmp_adev->sdma.ras->ras_block.ras_comm); in aldebaran_mode2_restore_hwcontext()
371 tmp_adev->gfx.ras->ras_block.ras_late_init) { in aldebaran_mode2_restore_hwcontext()
372 r = tmp_adev->gfx.ras->ras_block.ras_late_init(tmp_adev, in aldebaran_mode2_restore_hwcontext()
373 &tmp_adev->gfx.ras->ras_block.ras_comm); in aldebaran_mode2_restore_hwcontext()
A Damdgpu_ras.c97 if (!ras_block) in get_ras_block_str()
104 if (ras_block->block == AMDGPU_RAS_BLOCK__MCA) in get_ras_block_str()
107 return ras_block_string[ras_block->block]; in get_ras_block_str()
3707 struct ras_common_if *ras_block) in amdgpu_persistent_edc_harvesting() argument
3710 .head = *ras_block, in amdgpu_persistent_edc_harvesting()
3737 struct ras_common_if *ras_block) in amdgpu_ras_block_late_init() argument
3810 struct ras_common_if *ras_block) in amdgpu_ras_block_late_init_default() argument
3817 struct ras_common_if *ras_block) in amdgpu_ras_block_late_fini() argument
3820 if (!ras_block) in amdgpu_ras_block_late_fini()
3823 amdgpu_ras_sysfs_remove(adev, ras_block); in amdgpu_ras_block_late_fini()
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A Damdgpu_gfx.c887 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_gfx_ras_late_init()
894 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_gfx_ras_late_init()
904 amdgpu_ras_feature_enable_on_boot(adev, ras_block, 0); in amdgpu_gfx_ras_late_init()
909 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_gfx_ras_late_init()
932 strcpy(ras->ras_block.ras_comm.name, "gfx"); in amdgpu_gfx_ras_sw_init()
933 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__GFX; in amdgpu_gfx_ras_sw_init()
935 adev->gfx.ras_if = &ras->ras_block.ras_comm; in amdgpu_gfx_ras_sw_init()
938 if (!ras->ras_block.ras_late_init) in amdgpu_gfx_ras_sw_init()
942 if (!ras->ras_block.ras_cb) in amdgpu_gfx_ras_sw_init()
943 ras->ras_block.ras_cb = amdgpu_gfx_process_ras_data_cb; in amdgpu_gfx_ras_sw_init()
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A Damdgpu_sdma.h98 struct amdgpu_ras_block_object ras_block; member
166 struct ras_common_if *ras_block);
A Damdgpu_umc.h62 struct amdgpu_ras_block_object ras_block; member
106 int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
A Damdgpu_nbio.h51 struct amdgpu_ras_block_object ras_block; member
118 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
A Damdgpu_jpeg.h112 struct amdgpu_ras_block_object ras_block; member
148 struct ras_common_if *ras_block);
A Damdgpu_vcn.c1214 int amdgpu_vcn_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_vcn_ras_late_init() argument
1218 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_vcn_ras_late_init()
1222 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_vcn_ras_late_init()
1236 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_vcn_ras_late_init()
1249 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_vcn_ras_sw_init()
1255 strcpy(ras->ras_block.ras_comm.name, "vcn"); in amdgpu_vcn_ras_sw_init()
1256 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN; in amdgpu_vcn_ras_sw_init()
1257 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON; in amdgpu_vcn_ras_sw_init()
1258 adev->vcn.ras_if = &ras->ras_block.ras_comm; in amdgpu_vcn_ras_sw_init()
1260 if (!ras->ras_block.ras_late_init) in amdgpu_vcn_ras_sw_init()
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A Damdgpu_ras.h707 int (*ras_late_init)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
708 void (*ras_fini)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
826 struct ras_common_if *ras_block);
829 struct ras_common_if *ras_block);
890 const char *get_ras_block_str(struct ras_common_if *ras_block);
A Damdgpu_hdp.h28 struct amdgpu_ras_block_object ras_block; member
A Damdgpu_xgmi.c1092 static int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_xgmi_ras_late_init() argument
1102 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_xgmi_ras_late_init()
1120 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_xgmi_ras_late_init()
1475 .ras_block = {
1490 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_xgmi_ras_sw_init()
1496 strcpy(ras->ras_block.ras_comm.name, "xgmi_wafl"); in amdgpu_xgmi_ras_sw_init()
1497 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__XGMI_WAFL; in amdgpu_xgmi_ras_sw_init()
1498 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_xgmi_ras_sw_init()
1499 adev->gmc.xgmi.ras_if = &ras->ras_block.ras_comm; in amdgpu_xgmi_ras_sw_init()
A Damdgpu_mmhub.h48 struct amdgpu_ras_block_object ras_block; member
A Dmmhub_v1_8.c777 static int mmhub_v1_8_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in mmhub_v1_8_ras_late_init() argument
781 r = amdgpu_ras_block_late_init(adev, ras_block); in mmhub_v1_8_ras_late_init()
793 amdgpu_ras_block_late_fini(adev, ras_block); in mmhub_v1_8_ras_late_init()
799 .ras_block = {
A Dumc_v12_0.c505 static int umc_v12_0_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in umc_v12_0_ras_late_init() argument
509 ret = amdgpu_umc_ras_late_init(adev, ras_block); in umc_v12_0_ras_late_init()
680 .ras_block = {
A Damdgpu_vcn.h303 struct amdgpu_ras_block_object ras_block; member
516 struct ras_common_if *ras_block);
A Dhdp_v4_0.c174 .ras_block = {
A Damdgpu_mca.h72 struct amdgpu_ras_block_object ras_block; member

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