| /linux/arch/mips/ath79/ |
| A D | clock.c | 95 unsigned long ref_rate; in ar71xx_clocks_init() local
108 freq = div * ref_rate; in ar71xx_clocks_init()
251 ref_rate = ath79_setup_ref_clk(ref_rate); in ar934x_clocks_init()
313 cpu_rate = ref_rate; in ar934x_clocks_init()
323 ddr_rate = ref_rate; in ar934x_clocks_init()
333 ahb_rate = ref_rate; in ar934x_clocks_init()
366 ref_rate = ath79_setup_ref_clk(ref_rate); in qca953x_clocks_init()
402 cpu_rate = ref_rate; in qca953x_clocks_init()
412 ddr_rate = ref_rate; in qca953x_clocks_init()
449 ref_rate = ath79_setup_ref_clk(ref_rate); in qca955x_clocks_init()
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| /linux/drivers/clk/ti/ |
| A D | clkt_dpll.c | 292 unsigned long ref_rate; in omap2_dpll_round_rate() local
305 ref_rate = clk_hw_get_rate(dd->clk_ref); in omap2_dpll_round_rate()
310 scaled_rt_rp = target_rate / (ref_rate / DPLL_SCALE_FACTOR); in omap2_dpll_round_rate()
336 ref_rate); in omap2_dpll_round_rate()
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| A D | dpll3xxx.c | 304 unsigned long ref_rate; in omap3_noncore_dpll_ssc_program() local
318 ref_rate = clk_hw_get_rate(dd->clk_ref); in omap3_noncore_dpll_ssc_program()
320 (ref_rate / dd->last_rounded_n) / (4 * dd->ssc_modfreq); in omap3_noncore_dpll_ssc_program()
321 if (dd->ssc_modfreq > (ref_rate / 70)) in omap3_noncore_dpll_ssc_program()
323 __clk_get_name(clk->hw.clk), ref_rate / 70); in omap3_noncore_dpll_ssc_program()
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| /linux/drivers/clk/tegra/ |
| A D | clk-dfll.c | 202 #define DVCO_RATE_TO_MULT(rate, ref_rate) ((rate) / ((ref_rate) / 2)) argument
203 #define MULT_TO_DVCO_RATE(mult, ref_rate) ((mult) * ((ref_rate) / 2)) argument
276 unsigned long ref_rate; member
584 div = DIV_ROUND_UP(td->ref_rate, td->pwm_rate); in dfll_pwm_set_output_enabled()
855 val = DVCO_RATE_TO_MULT(rate, td->ref_rate); in dfll_calculate_rate_request()
1237 unsigned long ref_rate) in dfll_calc_monitored_rate() argument
1265 pre_scaler_rate = dfll_calc_monitored_rate(v, td->ref_rate); in dfll_read_monitor_rate()
1400 val = DIV_ROUND_UP(td->ref_rate, td->sample_rate * 32); in dfll_set_default_params()
1461 td->ref_rate = clk_get_rate(td->ref_clk); in dfll_init()
1462 if (td->ref_rate != REF_CLOCK_RATE) { in dfll_init()
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| /linux/arch/arm64/kernel/ |
| A D | topology.c | 122 u64 ratio, ref_rate = arch_timer_get_rate(); in freq_inv_set_max_ratio() local
124 if (unlikely(!max_rate || !ref_rate)) { in freq_inv_set_max_ratio()
143 ratio = ref_rate << (2 * SCHED_CAPACITY_SHIFT); in freq_inv_set_max_ratio()
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| /linux/arch/arm/mach-omap1/ |
| A D | clock.c | 234 unsigned long ref_rate; in omap1_select_table_rate() local
236 ref_rate = ck_ref_p->rate; in omap1_select_table_rate()
242 if (ptr->xtal != ref_rate) in omap1_select_table_rate()
329 unsigned long ref_rate; in omap1_round_to_table_rate() local
331 ref_rate = ck_ref_p->rate; in omap1_round_to_table_rate()
339 if (ptr->xtal != ref_rate) in omap1_round_to_table_rate()
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| /linux/drivers/phy/samsung/ |
| A D | phy-samsung-usb2.h | 39 unsigned long ref_rate; member
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| A D | phy-samsung-usb2.c | 205 drv->ref_rate = clk_get_rate(drv->ref_clk); in samsung_usb2_phy_probe()
207 ret = drv->cfg->rate_to_clk(drv->ref_rate, &drv->ref_reg_val); in samsung_usb2_phy_probe()
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| A D | phy-exynos5-usbdrd.c | 1321 unsigned long ref_rate; in exynos5_usbdrd_phy_clk_handle() local
1364 ref_rate = clk_get_rate(ref_clk); in exynos5_usbdrd_phy_clk_handle()
1365 ret = exynos5_rate_to_clk(ref_rate, &phy_drd->extrefclk); in exynos5_usbdrd_phy_clk_handle()
1369 ref_rate); in exynos5_usbdrd_phy_clk_handle()
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| /linux/sound/soc/meson/ |
| A D | axg-spdifin.c | 49 unsigned int ref_rate; member
165 ret = clk_set_rate(priv->refclk, priv->conf->ref_rate); in axg_spdifin_sample_mode_config()
396 .ref_rate = 333333333,
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| /linux/drivers/clk/nxp/ |
| A D | clk-lpc32xx.c | 477 unsigned long rate, cco_rate, ref_rate; in clk_pll_recalc_rate() local
503 ref_rate = parent_rate / clk->n_div; in clk_pll_recalc_rate()
504 rate = cco_rate = ref_rate * clk->m_div; in clk_pll_recalc_rate()
524 && pll_is_valid(ref_rate, 1, 1000000, 27000000))) in clk_pll_recalc_rate()
527 parent_rate, cco_rate, ref_rate); in clk_pll_recalc_rate()
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| /linux/drivers/clk/ralink/ |
| A D | clk-mtmips.c | 528 static u32 mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div) in mt7620_calc_rate() argument
532 t = ref_rate; in mt7620_calc_rate()
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| /linux/drivers/net/wireless/realtek/rtw89/ |
| A D | rtw8852bt.c | 147 .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
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| A D | rtw8852b.c | 149 .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
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| A D | mac_be.c | 1059 rtw89_write32_mask(rtwdev, reg, rrsr->ref_rate.mask, rrsr->ref_rate.data); in trxptcl_init_be()
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| A D | rtw8852a.c | 482 .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
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| A D | mac.c | 2622 reg = rtw89_mac_reg_by_idx(rtwdev, rrsr->ref_rate.addr, mac_idx); in trxptcl_init_ax()
2623 rtw89_write32_mask(rtwdev, reg, rrsr->ref_rate.mask, rrsr->ref_rate.data); in trxptcl_init_ax()
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| A D | rtw8851b.c | 184 .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
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| A D | rtw8922a.c | 164 .ref_rate = {R_BE_TRXPTCL_RESP_1, B_BE_WMAC_RESP_REF_RATE_SEL, 0},
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| A D | rtw8852c.c | 146 .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0},
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| A D | core.h | 4140 struct rtw89_reg3_def ref_rate; member
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| /linux/block/ |
| A D | bfq-iosched.c | 304 static int ref_rate[2] = {14000, 33000}; variable
7347 bfqd->rate_dur_prod = ref_rate[blk_queue_nonrot(bfqd->queue)] * in bfq_init_queue()
7349 bfqd->peak_rate = ref_rate[blk_queue_nonrot(bfqd->queue)] * 2 / 3; in bfq_init_queue()
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