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Searched refs:refclk (Results 1 – 25 of 308) sorted by relevance

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/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
A Dpllgt215.c42 lM = (info->refclk + info->vco1.max_inputfreq) / info->vco1.max_inputfreq; in gt215_pll_calc()
44 hM = (info->refclk + info->vco1.min_inputfreq) / info->vco1.min_inputfreq; in gt215_pll_calc()
50 N = tmp / info->refclk; in gt215_pll_calc()
51 fN = tmp % info->refclk; in gt215_pll_calc()
54 if (fN >= info->refclk / 2) in gt215_pll_calc()
57 if (fN < info->refclk / 2) in gt215_pll_calc()
59 fN = tmp - (N * info->refclk); in gt215_pll_calc()
67 err = abs(freq - (info->refclk * N / M / *P)); in gt215_pll_calc()
75 *pfN = ((fN << 13) + info->refclk / 2) / info->refclk; in gt215_pll_calc()
86 return info->refclk * *pN / *pM / *P; in gt215_pll_calc()
/linux/drivers/gpu/drm/i915/display/
A Dintel_cdclk.c1270 u16 refclk; member
1276 { .refclk = 19200, .cdclk = 144000, .ratio = 60 },
1277 { .refclk = 19200, .cdclk = 288000, .ratio = 60 },
1278 { .refclk = 19200, .cdclk = 384000, .ratio = 60 },
1279 { .refclk = 19200, .cdclk = 576000, .ratio = 60 },
1280 { .refclk = 19200, .cdclk = 624000, .ratio = 65 },
1285 { .refclk = 19200, .cdclk = 79200, .ratio = 33 },
1286 { .refclk = 19200, .cdclk = 158400, .ratio = 33 },
1478 for (i = 0; table[i].refclk; i++) in bxt_calc_cdclk()
1497 for (i = 0; table[i].refclk; i++) in bxt_calc_cdclk_pll_vco()
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A Dintel_dpll.c520 int refclk = 100000; in vlv_crtc_clock_get() local
550 int refclk = 100000; in chv_crtc_clock_get() local
977 int refclk = 100000; in bxt_find_best_dpll() local
1536 int refclk = 96000; in g4x_crtc_compute_clock() local
1543 refclk); in g4x_crtc_compute_clock()
1585 int refclk = 96000; in pnv_crtc_compute_clock() local
1592 refclk); in pnv_crtc_compute_clock()
1623 int refclk = 96000; in i9xx_crtc_compute_clock() local
1630 refclk); in i9xx_crtc_compute_clock()
1663 int refclk = 48000; in i8xx_crtc_compute_clock() local
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/linux/drivers/phy/ti/
A Dphy-dm816x-usb.c46 struct clk *refclk; member
76 if (clk_get_rate(phy->refclk) != 24000000) in dm816x_usb_phy_init()
123 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_suspend()
134 error = clk_enable(phy->refclk); in dm816x_usb_phy_runtime_resume()
151 clk_disable(phy->refclk); in dm816x_usb_phy_runtime_resume()
218 phy->refclk = devm_clk_get(phy->dev, "refclk"); in dm816x_usb_phy_probe()
219 if (IS_ERR(phy->refclk)) in dm816x_usb_phy_probe()
220 return PTR_ERR(phy->refclk); in dm816x_usb_phy_probe()
221 error = clk_prepare(phy->refclk); in dm816x_usb_phy_probe()
247 clk_unprepare(phy->refclk); in dm816x_usb_phy_probe()
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A Dphy-ti-pipe3.c172 struct clk *refclk; member
609 if (IS_ERR(phy->refclk)) { in ti_pipe3_get_clk()
615 return PTR_ERR(phy->refclk); in ti_pipe3_get_clk()
820 if (!IS_ERR(phy->refclk)) { in ti_pipe3_probe()
821 clk_prepare_enable(phy->refclk); in ti_pipe3_probe()
843 clk_disable_unprepare(phy->refclk); in ti_pipe3_remove()
853 if (!IS_ERR(phy->refclk)) { in ti_pipe3_enable_clocks()
884 if (!IS_ERR(phy->refclk)) in ti_pipe3_enable_clocks()
885 clk_disable_unprepare(phy->refclk); in ti_pipe3_enable_clocks()
894 if (!IS_ERR(phy->refclk)) in ti_pipe3_disable_clocks()
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/linux/drivers/phy/xilinx/
A Dphy-zynqmp.c215 unsigned int refclk; member
414 if (gtr_phy->refclk == gtr_phy->lane) in xpsgtr_configure_pll()
795 unsigned int refclk; in xpsgtr_xlate() local
825 refclk = args->args[3]; in xpsgtr_xlate()
827 !gtr_dev->refclk_sscs[refclk]) { in xpsgtr_xlate()
832 gtr_phy->refclk = refclk; in xpsgtr_xlate()
929 unsigned int refclk; in xpsgtr_get_ref_clocks() local
931 for (refclk = 0; refclk < ARRAY_SIZE(gtr_dev->refclk_sscs); ++refclk) { in xpsgtr_get_ref_clocks()
942 refclk); in xpsgtr_get_ref_clocks()
948 gtr_dev->clk[refclk] = clk; in xpsgtr_get_ref_clocks()
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/linux/drivers/net/ethernet/arc/
A Demac_rockchip.c32 struct clk *refclk; member
147 priv->refclk = devm_clk_get(dev, "macref"); in emac_rockchip_probe()
148 if (IS_ERR(priv->refclk)) { in emac_rockchip_probe()
150 PTR_ERR(priv->refclk)); in emac_rockchip_probe()
151 err = PTR_ERR(priv->refclk); in emac_rockchip_probe()
155 err = clk_prepare_enable(priv->refclk); in emac_rockchip_probe()
195 err = clk_set_rate(priv->refclk, 50000000); in emac_rockchip_probe()
241 clk_disable_unprepare(priv->refclk); in emac_rockchip_probe()
254 clk_disable_unprepare(priv->refclk); in emac_rockchip_remove()
/linux/Documentation/devicetree/bindings/pinctrl/
A Dmediatek,mt7620-pinctrl.yaml39 pa, pcie refclk, pcie rst, pcm gpio, pcm i2s, pcm uartf,
40 refclk, rgmii1, rgmii2, sd, spi, spi refclk, uartf, uartlite,
41 wdt refclk, wdt rst, wled]
70 spi refclk, uartf, uartlite, wdt, wled]
138 const: pcie refclk
183 const: refclk
228 const: spi refclk
232 enum: [spi refclk]
255 const: wdt refclk
/linux/drivers/gpu/drm/gma500/
A Dgma_display.h44 int target, int refclk,
49 void (*clock)(int refclk, struct gma_clock_t *clock);
50 const struct gma_limit_t *(*limit)(struct drm_crtc *crtc, int refclk);
83 extern const struct gma_limit_t *gma_limit(struct drm_crtc *crtc, int refclk);
88 struct drm_crtc *crtc, int target, int refclk,
A Dcdv_intel_display.c365 int refclk) in cdv_intel_limit() argument
373 if (refclk == 96000) in cdv_intel_limit()
379 if (refclk == 27000) in cdv_intel_limit()
384 if (refclk == 27000) in cdv_intel_limit()
403 int refclk, in cdv_intel_find_dp_pll() argument
411 switch (refclk) { in cdv_intel_find_dp_pll()
582 int refclk; in cdv_intel_crtc_mode_set() local
629 refclk = 96000; in cdv_intel_crtc_mode_set()
632 refclk = 27000; in cdv_intel_crtc_mode_set()
643 refclk = 27000; in cdv_intel_crtc_mode_set()
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A Doaktrail_crtc.c41 int refclk, struct gma_clock_t *best_clock);
45 int refclk, struct gma_clock_t *best_clock);
84 int refclk) in mrst_limit() argument
116 clock->dot = (refclk * clock->m) / (14 * clock->p1); in mrst_lvds_clock()
128 int refclk, struct gma_clock_t *best_clock) in mrst_sdvo_find_best_pll() argument
153 actual_freq = (refclk * clock.m) / in mrst_sdvo_find_best_pll()
186 int refclk, struct gma_clock_t *best_clock) in mrst_lvds_find_best_pll() argument
199 mrst_lvds_clock(refclk, &clock); in mrst_lvds_find_best_pll()
370 int refclk = 0; in oaktrail_crtc_mode_set() local
506 limit = mrst_limit(crtc, refclk); in oaktrail_crtc_mode_set()
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/linux/Documentation/devicetree/bindings/phy/
A Dfsl,imx8-pcie-phy.yaml43 fsl,refclk-pad-mode:
45 Specifies the mode of the refclk pad used. It can be UNUSED(PHY
47 is provided externally via the refclk pad) or OUTPUT(PHY refclock
48 is derived from SoC internal source and provided on the refclk pad).
79 - fsl,refclk-pad-mode
99 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
A Dfsl,imx8qm-hsio.yaml67 fsl,refclk-pad-mode:
69 Specifies the mode of the refclk pad used. INPUT(PHY refclock is
70 provided externally via the refclk pad) or OUTPUT(PHY refclock is
71 derived from SoC internal source and provided on the refclk pad).
162 fsl,refclk-pad-mode = "input";
/linux/Documentation/devicetree/bindings/usb/
A Docteon-usb.txt24 - cavium,refclk-type: type of the USB reference clock. Allowed values are
27 - refclk-frequency: deprecated, use "clock-frequency".
29 - refclk-type: deprecated, use "cavium,refclk-type".
54 cavium,refclk-type = "crystal";
A Ddwc3-cavium.txt18 refclk-frequency = <0x05f5e100>;
19 refclk-type-ss = "dlmc_ref_clk0";
20 refclk-type-hs = "dlmc_ref_clk0";
A Dsmsc,usb3503.yaml70 const: refclk
72 refclk-frequency:
122 clock-names = "refclk";
141 clock-names = "refclk";
156 refclk-frequency = <19200000>;
/linux/Documentation/devicetree/bindings/mips/cavium/
A Ductl.txt16 - refclk-frequency: A single cell containing the reference clock
19 - refclk-type: A string describing the reference clock connection
30 refclk-frequency = <24000000>;
32 refclk-type = "crystal";
/linux/Documentation/devicetree/bindings/clock/
A Dti,am62-audio-refclk.yaml4 $id: http://devicetree.org/schemas/clock/ti,am62-audio-refclk.yaml#
15 - const: ti,am62-audio-refclk
37 compatible = "ti,am62-audio-refclk";
A Dmarvell,berlin.txt18 "refclk" for the SoCs oscillator input on all SoCs,
29 clocks = <&refclk>;
30 clock-names = "refclk";
/linux/sound/soc/meson/
A Daxg-spdifin.c55 struct clk *refclk; member
165 ret = clk_set_rate(priv->refclk, priv->conf->ref_rate); in axg_spdifin_sample_mode_config()
175 rate = clk_get_rate(priv->refclk); in axg_spdifin_sample_mode_config()
229 ret = clk_prepare_enable(priv->refclk); in axg_spdifin_dai_probe()
251 clk_disable_unprepare(priv->refclk); in axg_spdifin_dai_remove()
470 priv->refclk = devm_clk_get(dev, "refclk"); in axg_spdifin_probe()
471 if (IS_ERR(priv->refclk)) in axg_spdifin_probe()
472 return dev_err_probe(dev, PTR_ERR(priv->refclk), "failed to get mclk\n"); in axg_spdifin_probe()
/linux/arch/arm/boot/dts/synaptics/
A Dberlin2cd.dtsi51 refclk: oscillator { label
389 clocks = <&refclk>;
446 clocks = <&refclk>;
453 clocks = <&refclk>;
461 clocks = <&refclk>;
486 clocks = <&refclk>;
497 clocks = <&refclk>;
507 clocks = <&refclk>;
532 clocks = <&refclk>;
544 clocks = <&refclk>;
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/linux/drivers/spi/
A Dspi-zynq-qspi.c136 struct clk *refclk; member
348 (clk_get_rate(xqspi->refclk) / (2 << baud_rate_val)) > in zynq_qspi_config_op()
386 clk_enable(qspi->refclk); in zynq_qspi_setup_op()
662 xqspi->refclk = devm_clk_get(&pdev->dev, "ref_clk"); in zynq_qspi_probe()
663 if (IS_ERR(xqspi->refclk)) { in zynq_qspi_probe()
665 ret = PTR_ERR(xqspi->refclk); in zynq_qspi_probe()
675 ret = clk_prepare_enable(xqspi->refclk); in zynq_qspi_probe()
710 ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2; in zynq_qspi_probe()
725 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_probe()
750 clk_disable_unprepare(xqspi->refclk); in zynq_qspi_remove()
/linux/drivers/phy/
A Dphy-pistachio-usb.c38 unsigned int refclk; member
68 p_phy->refclk << USB_PHY_STRAP_CONTROL_REFCLK_SHIFT); in pistachio_usb_phy_power_on()
71 if (p_phy->refclk == REFCLK_XO_CRYSTAL && rate != 12000000) { in pistachio_usb_phy_power_on()
161 &p_phy->refclk); in pistachio_usb_phy_probe()
/linux/arch/arm/boot/dts/ti/keystone/
A Dkeystone-k2hk-evm.dts59 clock-output-names = "refclk-sys";
66 clock-output-names = "refclk-pass";
73 clock-output-names = "refclk-arm";
80 clock-output-names = "refclk-ddr3a";
87 clock-output-names = "refclk-ddr3b";
/linux/drivers/net/ethernet/ti/
A Dcpts.c559 err = clk_enable(cpts->refclk); in cpts_register()
580 clk_disable(cpts->refclk); in cpts_register()
600 clk_disable(cpts->refclk); in cpts_unregister()
609 freq = clk_get_rate(cpts->refclk); in cpts_calc_mult_shift()
768 if (IS_ERR(cpts->refclk)) in cpts_create()
772 if (IS_ERR(cpts->refclk)) { in cpts_create()
774 PTR_ERR(cpts->refclk)); in cpts_create()
775 return ERR_CAST(cpts->refclk); in cpts_create()
778 ret = clk_prepare(cpts->refclk); in cpts_create()
805 if (WARN_ON(!cpts->refclk)) in cpts_release()
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