Home
last modified time | relevance | path

Searched refs:regMP0_SMN_C2PMSG_67 (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
A Dpsp_v13_0_4.c316 data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67); in psp_v13_0_4_ring_get_wptr()
330 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67, value); in psp_v13_0_4_ring_set_wptr()
A Dpsp_v13_0.c462 data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67); in psp_v13_0_ring_get_wptr()
476 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67, value); in psp_v13_0_ring_set_wptr()
775 reg_data = RREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67); in psp_v13_0_fatal_error_recovery_quirk()
776 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_67, reg_data + 0x10); in psp_v13_0_fatal_error_recovery_quirk()
/linux/drivers/gpu/drm/amd/include/asic_reg/mp/
A Dmp_13_0_4_offset.h101 #define regMP0_SMN_C2PMSG_67 macro
A Dmp_13_0_8_offset.h102 #define regMP0_SMN_C2PMSG_67 macro
A Dmp_13_0_2_offset.h101 #define regMP0_SMN_C2PMSG_67 macro
A Dmp_13_0_5_offset.h101 #define regMP0_SMN_C2PMSG_67 macro
A Dmp_13_0_0_offset.h99 #define regMP0_SMN_C2PMSG_67 macro
A Dmp_13_0_6_offset.h100 #define regMP0_SMN_C2PMSG_67 macro

Completed in 73 milliseconds