Searched refs:requested_dispclk_khz (Results 1 – 17 of 17) sorted by relevance
| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| A D | rn_clk_mgr_vbios_smu.c | 143 int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rn_vbios_smu_set_dispclk() argument
153 khz_to_mhz_ceil(requested_dispclk_khz)); in rn_vbios_smu_set_dispclk()
162 ASSERT(actual_dispclk_set_mhz >= khz_to_mhz_ceil(requested_dispclk_khz)); in rn_vbios_smu_set_dispclk()
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| A D | rn_clk_mgr_vbios_smu.h | 32 int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| A D | dcn301_smu.c | 145 int dcn301_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn301_smu_set_dispclk() argument
149 DC_LOG_DEBUG("%s(%d)\n", __func__, requested_dispclk_khz); in dcn301_smu_set_dispclk()
155 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn301_smu_set_dispclk()
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| A D | dcn301_smu.h | 151 int dcn301_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_smu.c | 161 int dcn316_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn316_smu_set_dispclk() argument
166 return requested_dispclk_khz; in dcn316_smu_set_dispclk()
172 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn316_smu_set_dispclk()
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| A D | dcn316_smu.h | 123 int dcn316_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| A D | rv1_clk_mgr_vbios_smu.c | 125 int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rv1_vbios_smu_set_dispclk() argument
135 khz_to_mhz_ceil(requested_dispclk_khz)); in rv1_vbios_smu_set_dispclk()
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| A D | rv1_clk_mgr_vbios_smu.h | 29 int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| A D | dcn35_smu.c | 193 int dcn35_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn35_smu_set_dispclk() argument
198 return requested_dispclk_khz; in dcn35_smu_set_dispclk()
204 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn35_smu_set_dispclk()
206 …smu_print("requested_dispclk_khz = %d, actual_dispclk_set_mhz: %d\n", requested_dispclk_khz, actua… in dcn35_smu_set_dispclk()
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| A D | dcn35_smu.h | 180 int dcn35_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_smu.c | 175 int dcn314_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn314_smu_set_dispclk() argument
180 return requested_dispclk_khz; in dcn314_smu_set_dispclk()
186 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn314_smu_set_dispclk()
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| A D | dcn314_smu.h | 94 int dcn314_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/ |
| A D | dcn315_smu.c | 187 int dcn315_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn315_smu_set_dispclk() argument
192 return requested_dispclk_khz; in dcn315_smu_set_dispclk()
198 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn315_smu_set_dispclk()
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| A D | dcn315_smu.h | 115 int dcn315_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| A D | dcn31_smu.c | 156 int dcn31_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in dcn31_smu_set_dispclk() argument
161 return requested_dispclk_khz; in dcn31_smu_set_dispclk()
167 khz_to_mhz_ceil(requested_dispclk_khz)); in dcn31_smu_set_dispclk()
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| A D | dcn31_smu.h | 255 int dcn31_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | clk_mgr_internal.h | 364 int (*set_dispclk)(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
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