| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
| A D | dcn201_clk_mgr.c | 86 bool safe_to_lower) in dcn201_update_clocks() argument 116 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) in dcn201_update_clocks() 123 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks() 126 if (should_set_clock(safe_to_lower, in dcn201_update_clocks() 130 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn201_update_clocks() 140 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) in dcn201_update_clocks() 143 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn201_update_clocks() 151 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn201_update_clocks() 157 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn201_update_clocks() 160 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn201_update_clocks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn21/ |
| A D | dcn21_hubbub.c | 145 bool safe_to_lower) in hubbub21_program_urgent_watermarks() argument 168 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks() 178 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks() 213 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks() 223 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks() 258 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub21_program_urgent_watermarks() 268 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks() 313 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub21_program_urgent_watermarks() 339 bool safe_to_lower) in hubbub21_program_stutter_watermarks() argument 492 bool safe_to_lower) in hubbub21_program_pstate_watermarks() argument [all …]
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| A D | dcn21_hubbub.h | 132 bool safe_to_lower); 137 bool safe_to_lower); 142 bool safe_to_lower); 147 bool safe_to_lower);
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn32/ |
| A D | dcn32_hubbub.c | 172 bool safe_to_lower) in hubbub32_program_urgent_watermarks() argument 194 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub32_program_urgent_watermarks() 204 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub32_program_urgent_watermarks() 238 if (safe_to_lower || watermarks->b.frac_urg_bw_flip in hubbub32_program_urgent_watermarks() 248 if (safe_to_lower || watermarks->b.frac_urg_bw_nom in hubbub32_program_urgent_watermarks() 292 if (safe_to_lower || watermarks->c.frac_urg_bw_nom in hubbub32_program_urgent_watermarks() 336 if (safe_to_lower || watermarks->d.frac_urg_bw_nom in hubbub32_program_urgent_watermarks() 362 bool safe_to_lower) in hubbub32_program_stutter_watermarks() argument 508 bool safe_to_lower) in hubbub32_program_pstate_watermarks() argument 661 bool safe_to_lower) in hubbub32_program_usr_watermarks() argument [all …]
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| A D | dcn32_hubbub.h | 123 bool safe_to_lower); 129 bool safe_to_lower); 135 bool safe_to_lower); 141 bool safe_to_lower);
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn31/ |
| A D | dcn31_hubbub.c | 177 bool safe_to_lower) in hubbub31_program_urgent_watermarks() argument 199 if (safe_to_lower || watermarks->a.frac_urg_bw_flip in hubbub31_program_urgent_watermarks() 209 if (safe_to_lower || watermarks->a.frac_urg_bw_nom in hubbub31_program_urgent_watermarks() 243 if (safe_to_lower || watermarks->b.frac_urg_bw_flip in hubbub31_program_urgent_watermarks() 253 if (safe_to_lower || watermarks->b.frac_urg_bw_nom in hubbub31_program_urgent_watermarks() 287 if (safe_to_lower || watermarks->c.frac_urg_bw_flip in hubbub31_program_urgent_watermarks() 297 if (safe_to_lower || watermarks->c.frac_urg_bw_nom in hubbub31_program_urgent_watermarks() 341 if (safe_to_lower || watermarks->d.frac_urg_bw_nom in hubbub31_program_urgent_watermarks() 367 bool safe_to_lower) in hubbub31_program_stutter_watermarks() argument 640 bool safe_to_lower) in hubbub31_program_pstate_watermarks() argument [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| A D | dcn20_clk_mgr.c | 105 struct dc_state *context, bool safe_to_lower) in dcn20_update_clocks_update_dpp_dto() argument 121 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn20_update_clocks_update_dpp_dto() 218 bool safe_to_lower) in dcn2_update_clocks() argument 253 if (enter_display_off == safe_to_lower) { in dcn2_update_clocks() 268 if (should_set_clock(safe_to_lower, in dcn2_update_clocks() 321 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn2_update_clocks() 324 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn2_update_clocks() 331 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn2_update_clocks() 345 bool safe_to_lower) in dcn2_update_clocks_fpga() argument 361 if (should_set_clock(safe_to_lower, in dcn2_update_clocks_fpga() [all …]
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| A D | dcn20_clk_mgr.h | 31 bool safe_to_lower); 35 bool safe_to_lower); 37 struct dc_state *context, bool safe_to_lower);
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn10/ |
| A D | dcn10_hubbub.c | 247 bool safe_to_lower) in hubbub1_program_urgent_watermarks() argument 361 bool safe_to_lower) in hubbub1_program_stutter_watermarks() argument 384 if (safe_to_lower || watermarks->a.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks() 417 if (safe_to_lower || watermarks->b.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks() 450 if (safe_to_lower || watermarks->c.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks() 483 if (safe_to_lower || watermarks->d.cstate_pstate.cstate_exit_ns in hubbub1_program_stutter_watermarks() 506 bool safe_to_lower) in hubbub1_program_pstate_watermarks() argument 513 if (safe_to_lower || watermarks->a.cstate_pstate.pstate_change_ns in hubbub1_program_pstate_watermarks() 530 if (safe_to_lower || watermarks->b.cstate_pstate.pstate_change_ns in hubbub1_program_pstate_watermarks() 547 if (safe_to_lower || watermarks->c.cstate_pstate.pstate_change_ns in hubbub1_program_pstate_watermarks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| A D | rv1_clk_mgr.c | 89 bool safe_to_lower) in ramp_up_dispclk_with_dpp() argument 153 if (!safe_to_lower) in ramp_up_dispclk_with_dpp() 189 bool safe_to_lower) in rv1_update_clocks() argument 214 if (enter_display_off == safe_to_lower) { in rv1_update_clocks() 230 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { in rv1_update_clocks() 239 if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, clk_mgr_base->clks.fclk_khz)) { in rv1_update_clocks() 245 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rv1_update_clocks() 250 if (should_set_clock(safe_to_lower, in rv1_update_clocks() 272 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz) in rv1_update_clocks() 274 ramp_up_dispclk_with_dpp(clk_mgr, dc, new_clocks, safe_to_lower); in rv1_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn401/ |
| A D | dcn401_hubbub.c | 71 bool safe_to_lower) in hubbub401_program_urgent_watermarks() argument 189 bool safe_to_lower) in hubbub401_program_stutter_watermarks() argument 195 if (safe_to_lower || watermarks->dcn4x.a.sr_enter in hubbub401_program_stutter_watermarks() 216 if (safe_to_lower || watermarks->dcn4x.a.sr_exit in hubbub401_program_stutter_watermarks() 238 if (safe_to_lower || watermarks->dcn4x.b.sr_enter in hubbub401_program_stutter_watermarks() 259 if (safe_to_lower || watermarks->dcn4x.b.sr_exit in hubbub401_program_stutter_watermarks() 288 bool safe_to_lower) in hubbub401_program_pstate_watermarks() argument 415 bool safe_to_lower) in hubbub401_program_usr_watermarks() argument 421 if (safe_to_lower || watermarks->dcn4x.a.usr in hubbub401_program_usr_watermarks() 434 if (safe_to_lower || watermarks->dcn4x.b.usr in hubbub401_program_usr_watermarks() [all …]
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| A D | dcn401_hubbub.h | 133 bool safe_to_lower); 139 bool safe_to_lower); 145 bool safe_to_lower); 151 bool safe_to_lower);
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/ |
| A D | dcn401_clk_mgr.c | 619 bool safe_to_lower) in dcn401_update_clocks_legacy() argument 658 if (enter_display_off == safe_to_lower) in dcn401_update_clocks_legacy() 937 bool safe_to_lower) in dcn401_build_update_bandwidth_clocks_sequence() argument 970 if (enter_display_off == safe_to_lower) { in dcn401_build_update_bandwidth_clocks_sequence() 1224 bool safe_to_lower) in dcn401_build_update_display_clocks_sequence() argument 1305 block_sequence[num_steps].params.update_dppclk_dto_params.safe_to_lower = safe_to_lower; in dcn401_build_update_display_clocks_sequence() 1322 block_sequence[num_steps].params.update_dppclk_dto_params.safe_to_lower = safe_to_lower; in dcn401_build_update_display_clocks_sequence() 1344 block_sequence[num_steps].params.update_dppclk_dto_params.safe_to_lower = safe_to_lower; in dcn401_build_update_display_clocks_sequence() 1363 bool safe_to_lower) in dcn401_update_clocks() argument 1378 safe_to_lower); in dcn401_update_clocks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn35/ |
| A D | dcn35_hubbub.c | 116 bool safe_to_lower) in hubbub35_program_stutter_z8_watermarks() argument 139 if (safe_to_lower || watermarks->a.cstate_pstate.cstate_exit_z8_ns in hubbub35_program_stutter_z8_watermarks() 157 if (safe_to_lower || watermarks->b.cstate_pstate.cstate_enter_plus_exit_z8_ns in hubbub35_program_stutter_z8_watermarks() 173 if (safe_to_lower || watermarks->b.cstate_pstate.cstate_exit_z8_ns in hubbub35_program_stutter_z8_watermarks() 190 if (safe_to_lower || watermarks->c.cstate_pstate.cstate_enter_plus_exit_z8_ns in hubbub35_program_stutter_z8_watermarks() 206 if (safe_to_lower || watermarks->c.cstate_pstate.cstate_exit_z8_ns in hubbub35_program_stutter_z8_watermarks() 223 if (safe_to_lower || watermarks->d.cstate_pstate.cstate_enter_plus_exit_z8_ns in hubbub35_program_stutter_z8_watermarks() 239 if (safe_to_lower || watermarks->d.cstate_pstate.cstate_exit_z8_ns in hubbub35_program_stutter_z8_watermarks() 302 bool safe_to_lower) in hubbub35_program_watermarks() argument 307 if (hubbub32_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub35_program_watermarks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/ |
| A D | dcn30_clk_mgr.c | 194 bool safe_to_lower) in dcn3_update_clocks() argument 227 if (enter_display_off == safe_to_lower) in dcn3_update_clocks() 234 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn3_update_clocks() 244 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn3_update_clocks() 252 if (dc->clk_mgr->dc_mode_softmax_enabled && safe_to_lower && !p_state_change_support) { in dcn3_update_clocks() 275 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn3_update_clocks() 285 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn3_update_clocks() 294 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn3_update_clocks() 300 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn3_update_clocks() 303 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn3_update_clocks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/ |
| A D | dcn35_clk_mgr.c | 124 bool safe_to_lower, bool disable) in dcn35_disable_otg_wa() argument 135 struct pipe_ctx *pipe = safe_to_lower in dcn35_disable_otg_wa() 193 struct dc_state *context, bool safe_to_lower) in dcn35_update_clocks_update_dpp_dto() argument 222 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn35_update_clocks_update_dpp_dto() 227 if (safe_to_lower) in dcn35_update_clocks_update_dpp_dto() 254 bool safe_to_lower) in dcn35_notify_host_router_bw() argument 289 bool safe_to_lower) in dcn35_update_clocks() argument 312 if (safe_to_lower) { in dcn35_update_clocks() 365 if (should_set_clock(safe_to_lower, in dcn35_update_clocks() 994 bool safe_to_lower) in dcn35_update_clocks_fpga() argument [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/ |
| A D | dcn316_clk_mgr.c | 103 bool safe_to_lower, bool disable) in dcn316_disable_otg_wa() argument 109 struct pipe_ctx *pipe = safe_to_lower in dcn316_disable_otg_wa() 137 bool safe_to_lower) in dcn316_update_clocks() argument 156 if (safe_to_lower) { in dcn316_update_clocks() 190 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn316_update_clocks() 195 if (should_set_clock(safe_to_lower, in dcn316_update_clocks() 207 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn316_update_clocks() 215 dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, true); in dcn316_update_clocks() 219 dcn316_disable_otg_wa(clk_mgr_base, context, safe_to_lower, false); in dcn316_update_clocks() 226 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn316_update_clocks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hubbub/dcn201/ |
| A D | dcn201_hubbub.c | 57 bool safe_to_lower) in hubbub201_program_watermarks() argument 62 if (hubbub1_program_urgent_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub201_program_watermarks() 65 if (hubbub1_program_pstate_watermarks(hubbub, watermarks, refclk_mhz, safe_to_lower)) in hubbub201_program_watermarks()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/ |
| A D | dce120_clk_mgr.c | 86 bool safe_to_lower) in dce12_update_clocks() argument 97 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce12_update_clocks() 112 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr_base->clks.phyclk_khz)) { in dce12_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | clk_mgr_internal.h | 376 static inline bool should_set_clock(bool safe_to_lower, int calc_clk, int cur_clk) in should_set_clock() argument 378 return ((safe_to_lower && calc_clk < cur_clk) || calc_clk > cur_clk); in should_set_clock() 381 static inline bool should_update_pstate_support(bool safe_to_lower, bool calc_support, bool cur_sup… in should_update_pstate_support() argument 384 if (calc_support && safe_to_lower) in should_update_pstate_support() 386 else if (!calc_support && !safe_to_lower) in should_update_pstate_support()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/ |
| A D | dcn32_clk_mgr.c | 315 struct dc_state *context, bool safe_to_lower) in dcn32_update_clocks_update_dpp_dto() argument 342 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in dcn32_update_clocks_update_dpp_dto() 623 bool safe_to_lower) in dcn32_update_clocks() argument 658 if (enter_display_off == safe_to_lower) in dcn32_update_clocks() 680 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && in dcn32_update_clocks() 692 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) in dcn32_update_clocks() 771 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in dcn32_update_clocks() 791 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn32_update_clocks() 811 if (dc->config.forced_clocks == false || (force_reset && safe_to_lower)) { in dcn32_update_clocks() 814 dcn32_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn32_update_clocks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/ |
| A D | dce60_clk_mgr.c | 122 bool safe_to_lower) in dce60_update_clocks() argument 134 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce60_update_clocks() 140 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce60_update_clocks()
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| A D | dce_clk_mgr.c | 674 bool safe_to_lower) in dce_update_clocks() argument 686 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks() 692 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce_update_clocks() 701 bool safe_to_lower) in dce11_update_clocks() argument 713 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks() 719 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce11_update_clocks() 728 bool safe_to_lower) in dce112_update_clocks() argument 746 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce112_update_clocks() 755 bool safe_to_lower) in dce12_update_clocks() argument 766 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce12_update_clocks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| A D | rn_clk_mgr.c | 107 struct dc_state *context, int ref_dpp_clk, bool safe_to_lower) in rn_update_clocks_update_dpp_dto() argument 124 if (safe_to_lower || prev_dppclk_khz < dppclk_khz) in rn_update_clocks_update_dpp_dto() 133 bool safe_to_lower) in rn_update_clocks() argument 152 if (safe_to_lower && !dc->debug.disable_48mhz_pwrdwn) { in rn_update_clocks() 174 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks() 179 if (should_set_clock(safe_to_lower, in rn_update_clocks() 199 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr_base->clks.dppclk_khz)) { in rn_update_clocks() 206 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in rn_update_clocks() 219 safe_to_lower); in rn_update_clocks() 229 safe_to_lower); in rn_update_clocks() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/ |
| A D | dcn314_clk_mgr.c | 149 bool safe_to_lower, bool disable) in dcn314_disable_otg_wa() argument 155 struct pipe_ctx *pipe = safe_to_lower in dcn314_disable_otg_wa() 207 bool safe_to_lower) in dcn314_update_clocks() argument 225 if (safe_to_lower) { in dcn314_update_clocks() 274 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn314_update_clocks() 279 if (should_set_clock(safe_to_lower, in dcn314_update_clocks() 289 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn314_update_clocks() 297 dcn314_disable_otg_wa(clk_mgr_base, context, safe_to_lower, true); in dcn314_update_clocks() 301 dcn314_disable_otg_wa(clk_mgr_base, context, safe_to_lower, false); in dcn314_update_clocks() 308 dcn20_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower); in dcn314_update_clocks() [all …]
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