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Searched refs:sclk (Results 1 – 25 of 206) sorted by relevance

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/linux/drivers/clk/hisilicon/
A Dclkgate-separated.c39 if (sclk->lock) in clkgate_separated_enable()
41 reg = BIT(sclk->bit_idx); in clkgate_separated_enable()
44 if (sclk->lock) in clkgate_separated_enable()
56 if (sclk->lock) in clkgate_separated_disable()
58 reg = BIT(sclk->bit_idx); in clkgate_separated_disable()
61 if (sclk->lock) in clkgate_separated_disable()
93 sclk = kzalloc(sizeof(*sclk), GFP_KERNEL); in hisi_register_clkgate_sep()
94 if (!sclk) in hisi_register_clkgate_sep()
106 sclk->hw.init = &init; in hisi_register_clkgate_sep()
107 sclk->lock = lock; in hisi_register_clkgate_sep()
[all …]
/linux/drivers/clk/meson/
A Dsclk-div.c33 return (1 << sclk->div.width) - 1; in sclk_div_maxval()
38 return sclk_div_maxval(sclk) + 1; in sclk_div_maxdiv()
61 maxdiv = sclk_div_maxdiv(sclk); in sclk_div_bestdiv()
116 sclk->cached_duty.num, in sclk_apply_ratio()
117 sclk->cached_duty.den); in sclk_apply_ratio()
133 sclk_apply_ratio(clk, sclk); in sclk_div_set_duty_cycle()
154 duty->den = sclk->cached_div; in sclk_div_get_duty_cycle()
162 sclk_apply_ratio(clk, sclk); in sclk_apply_divider()
164 meson_parm_write(clk->map, &sclk->div, sclk->cached_div - 1); in sclk_apply_divider()
230 sclk->cached_div = sclk_div_maxdiv(sclk); in sclk_div_init()
[all …]
/linux/drivers/clk/
A Dclk-scmi.c236 sclk->hw.init = &init; in scmi_clk_ops_init()
437 sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL); in scmi_clocks_probe()
438 if (!sclk) in scmi_clocks_probe()
442 if (!sclk->info) { in scmi_clocks_probe()
448 sclk->id = idx; in scmi_clocks_probe()
449 sclk->ph = ph; in scmi_clocks_probe()
450 sclk->dev = dev; in scmi_clocks_probe()
467 sclk->parent_data = devm_kcalloc(dev, sclk->info->num_parents, in scmi_clocks_probe()
473 sclk->parent_data[i].index = sclk->info->parents[i]; in scmi_clocks_probe()
474 sclk->parent_data[i].hw = hws[sclk->info->parents[i]]; in scmi_clocks_probe()
[all …]
A Dclk-scpi.c149 sclk->hw.init = &init; in scpi_clk_ops_init()
153 sclk->info = sclk->scpi_ops->dvfs_get_info(sclk->id); in scpi_clk_ops_init()
154 if (IS_ERR(sclk->info)) in scpi_clk_ops_init()
157 if (sclk->scpi_ops->clk_get_range(sclk->id, &min, &max) || !max) in scpi_clk_ops_init()
177 struct scpi_clk *sclk; in scpi_of_clk_src_get() local
183 if (idx == sclk->id) in scpi_of_clk_src_get()
184 return &sclk->hw; in scpi_of_clk_src_get()
213 struct scpi_clk *sclk; in scpi_clk_add() local
217 sclk = devm_kzalloc(dev, sizeof(*sclk), GFP_KERNEL); in scpi_clk_add()
218 if (!sclk) in scpi_clk_add()
[all …]
A Dclk-nomadik.c334 return !!(val & sclk->clkbit); in src_clk_is_enabled()
356 struct clk_src *sclk; in src_clk_register() local
359 sclk = kzalloc(sizeof(*sclk), GFP_KERNEL); in src_clk_register()
360 if (!sclk) in src_clk_register()
372 sclk->hw.init = &init; in src_clk_register()
373 sclk->id = id; in src_clk_register()
374 sclk->group1 = (id > 31); in src_clk_register()
375 sclk->clkbit = BIT(id & 0x1f); in src_clk_register()
378 name, id, sclk->group1, sclk->clkbit); in src_clk_register()
382 kfree(sclk); in src_clk_register()
[all …]
/linux/drivers/clk/ralink/
A Dclk-mt7621.c147 .name = sclk->name, in mt7621_gate_ops_init()
150 sclk->hw.init = &init; in mt7621_gate_ops_init()
159 struct mt7621_gate *sclk; in mt7621_register_gates() local
164 sclk->priv = priv; in mt7621_register_gates()
171 hws[sclk->idx] = &sclk->hw; in mt7621_register_gates()
209 sclk->hw = clk_hw_register_fixed_rate(dev, sclk->name, in mt7621_register_fixed_clocks()
211 sclk->rate); in mt7621_register_fixed_clocks()
212 if (IS_ERR(sclk->hw)) { in mt7621_register_fixed_clocks()
218 hws[sclk->idx] = sclk->hw; in mt7621_register_fixed_clocks()
327 sclk->priv = priv; in mt7621_register_early_clocks()
[all …]
A Dclk-mtmips.c231 struct mtmips_clk *sclk; in mtmips_register_pherip_clocks() local
246 hws[idx] = &sclk->hw; in mtmips_register_pherip_clocks()
291 sclk->hw = clk_hw_register_fixed_rate(NULL, sclk->name, in mtmips_register_fixed_clocks()
293 sclk->rate); in mtmips_register_fixed_clocks()
300 hws[idx] = sclk->hw; in mtmips_register_fixed_clocks()
342 sclk->hw = clk_hw_register_fixed_factor(NULL, sclk->name, in mtmips_register_factor_clocks()
343 sclk->parent, sclk->flags, in mtmips_register_factor_clocks()
344 sclk->mult, sclk->div); in mtmips_register_factor_clocks()
351 hws[idx] = sclk->hw; in mtmips_register_factor_clocks()
726 sclk->priv = priv; in mtmips_register_clocks()
[all …]
/linux/drivers/clk/microchip/
A Dclk-core.c802 v = readl(sclk->slew_reg); in sclk_set_rate()
808 writel(v, sclk->slew_reg); in sclk_set_rate()
826 if (!sclk->parent_map) in sclk_get_parent()
845 nosc = sclk->parent_map ? sclk->parent_map[index] : index; in sclk_set_parent()
848 v = readl(sclk->mux_reg); in sclk_set_parent()
854 writel(v, sclk->mux_reg); in sclk_set_parent()
895 if (sclk->slew_div) { in sclk_init()
897 v = readl(sclk->slew_reg); in sclk_init()
933 sclk = devm_kzalloc(core->dev, sizeof(*sclk), GFP_KERNEL); in pic32_sys_clk_register()
934 if (!sclk) in pic32_sys_clk_register()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
A Dgk104.c68 u32 sclk; in read_pll() local
77 sclk = device->crystal; in read_pll()
101 sclk = (sclk * N) + (((u16)(fN + 4096) * sclk) >> 13); in read_pll()
102 return sclk / (M * P); in read_pll()
123 return (sclk * 2) / sdiv; in read_div()
149 u32 sclk, sdiv; in read_clk() local
182 return (sclk * 2) / sdiv; in read_clk()
185 return sclk; in read_clk()
236 u32 sclk; in calc_src() local
258 sclk = calc_div(clk, idx, sclk, freq, ddiv); in calc_src()
[all …]
A Dgf100.c67 u32 sclk; in read_pll() local
75 sclk = device->crystal; in read_pll()
94 return sclk * N / M / P; in read_pll()
102 u32 sclk, sctl, sdiv = 2; in read_div() local
126 return (sclk * 2) / sdiv; in read_div()
138 u32 sclk, sdiv; in read_clk() local
152 return (sclk * 2) / sdiv; in read_clk()
154 return sclk; in read_clk()
223 u32 sclk; in calc_src() local
245 sclk = calc_div(clk, idx, sclk, freq, ddiv); in calc_src()
[all …]
A Dgt215.c64 u32 sctl, sdiv, sclk; in read_clk() local
99 sclk = read_vco(clk, idx); in read_clk()
101 return (sclk * 2) / sdiv; in read_clk()
112 u32 sclk = 0, P = 1, N = 1, M = 1; in read_pll() local
131 sclk = read_clk(clk, 0x10 + idx, false); in read_pll()
139 return sclk * N / MP; in read_pll()
191 u32 oclk, sclk, sdiv; in gt215_clk_info() local
207 sclk = read_vco(clk, idx); in gt215_clk_info()
208 sdiv = min((sclk * 2) / khz, (u32)65); in gt215_clk_info()
209 oclk = (sclk * 2) / sdiv; in gt215_clk_info()
[all …]
/linux/drivers/gpu/drm/radeon/
A Drv730_dpm.c39 RV770_SMC_SCLK_VALUE *sclk) in rv730_populate_sclk_value() argument
106 sclk->sclk_value = cpu_to_be32(engine_clock); in rv730_populate_sclk_value()
107 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv730_populate_sclk_value()
108 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv730_populate_sclk_value()
306 table->ACPIState.levels[0].sclk.sclk_value = 0; in rv730_populate_smc_acpi_state()
342 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in rv730_populate_smc_initial_state()
353 table->initialState.levels[0].sclk.sclk_value = in rv730_populate_smc_initial_state()
354 cpu_to_be32(initial_state->low.sclk); in rv730_populate_smc_initial_state()
413 state->high.sclk, in rv730_program_memory_timing_parameters()
423 state->medium.sclk, in rv730_program_memory_timing_parameters()
[all …]
A Dbtc_dpm.c2089 ps->high.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()
2098 ps->medium.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()
2106 if (ps->low.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()
2107 ps->low.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()
2117 sclk = ps->low.sclk; in btc_apply_state_adjust_rules()
2122 sclk = ps->low.sclk; in btc_apply_state_adjust_rules()
2129 ps->low.sclk = sclk; in btc_apply_state_adjust_rules()
2138 if (ps->medium.sclk < ps->low.sclk) in btc_apply_state_adjust_rules()
2139 ps->medium.sclk = ps->low.sclk; in btc_apply_state_adjust_rules()
2142 if (ps->high.sclk < ps->medium.sclk) in btc_apply_state_adjust_rules()
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A Drv770_dpm.c281 a_n = (int)state->high.sclk * pi->lhp + (int)state->medium.sclk * in rv770_populate_smc_t()
631 &level->sclk); in rv770_convert_power_level_to_smc()
634 &level->sclk); in rv770_convert_power_level_to_smc()
637 &level->sclk); in rv770_convert_power_level_to_smc()
749 if (state->high.sclk < (state->low.sclk * 0xFF / 0x40)) in rv770_program_memory_timing_parameters()
1444 if (new_state->high.sclk >= current_state->high.sclk) in rv770_set_uvd_clock_before_set_eng_clock()
1461 if (new_state->high.sclk < current_state->high.sclk) in rv770_set_uvd_clock_after_set_eng_clock()
2182 u32 sclk, mclk; in rv7xx_parse_pplib_clock_info() local
2218 pl->sclk = sclk; in rv7xx_parse_pplib_clock_info()
2261 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; in rv7xx_parse_pplib_clock_info()
[all …]
A Dtrinity_dpm.c1288 if (sclk < 20000) in trinity_calculate_vce_wm()
1318 if (sclk < min) in trinity_get_sleep_divider_id_from_clock()
1519 ps->levels[i].sclk = in trinity_apply_state_adjust_rules()
1525 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in trinity_apply_state_adjust_rules()
1526 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in trinity_apply_state_adjust_rules()
1666 u32 sclk; in trinity_parse_pplib_clock_info() local
1670 pl->sclk = sclk; in trinity_parse_pplib_clock_info()
1760 u32 sclk; in trinity_parse_power_table() local
1766 rdev->pm.dpm.vce_states[i].sclk = sclk; in trinity_parse_power_table()
1977 i, pl->sclk, in trinity_dpm_print_power_state()
[all …]
A Drv740_dpm.c120 RV770_SMC_SCLK_VALUE *sclk) in rv740_populate_sclk_value() argument
175 sclk->sclk_value = cpu_to_be32(engine_clock); in rv740_populate_sclk_value()
176 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv740_populate_sclk_value()
177 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv740_populate_sclk_value()
178 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv740_populate_sclk_value()
179 sclk->vCG_SPLL_SPREAD_SPECTRUM = cpu_to_be32(cg_spll_spread_spectrum); in rv740_populate_sclk_value()
180 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2); in rv740_populate_sclk_value()
385 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv740_populate_smc_acpi_state()
386 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv740_populate_smc_acpi_state()
387 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv740_populate_smc_acpi_state()
[all …]
A Dkv_dpm.c1770 table->sclk = in kv_construct_max_power_limits_table()
1885 if (sclk < min) in kv_get_sleep_divider_id_from_clock()
1985 if (ps->levels[i].sclk < sclk) in kv_apply_state_adjust_rules()
1986 ps->levels[i].sclk = sclk; in kv_apply_state_adjust_rules()
2413 u32 sclk; in kv_parse_pplib_clock_info() local
2417 pl->sclk = sclk; in kv_parse_pplib_clock_info()
2505 u32 sclk; in kv_parse_power_table() local
2511 rdev->pm.dpm.vce_states[i].sclk = sclk; in kv_parse_power_table()
2604 u32 sclk, tmp; in kv_dpm_debugfs_print_current_performance_level() local
2627 u32 sclk; in kv_dpm_get_current_sclk() local
[all …]
A Dni_dpm.c810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()
811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()
834 if (ps->performance_levels[i].sclk < ps->performance_levels[i - 1].sclk) in ni_apply_state_adjust_rules()
835 ps->performance_levels[i].sclk = ps->performance_levels[i - 1].sclk; in ni_apply_state_adjust_rules()
2058 sclk->sclk_value = engine_clock; in ni_calculate_sclk_params()
2071 NISLANDS_SMC_SCLK_VALUE *sclk) in ni_populate_sclk_value() argument
2100 u32 sclk = 0; in ni_init_smc_spll_table() local
2148 sclk += 512; in ni_init_smc_spll_table()
2328 ret = ni_populate_sclk_value(rdev, pl->sclk, &level->sclk); in ni_convert_power_level_to_smc()
3978 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; in ni_parse_pplib_clock_info()
[all …]
/linux/sound/soc/meson/
A Daxg-tdm-formatter.c20 struct clk *sclk; member
114 ret = clk_set_phase(formatter->sclk, invert ? 0 : 180); in axg_tdm_formatter_enable()
126 ret = clk_prepare_enable(formatter->sclk); in axg_tdm_formatter_enable()
132 clk_disable_unprepare(formatter->sclk); in axg_tdm_formatter_enable()
151 clk_disable_unprepare(formatter->sclk); in axg_tdm_formatter_disable()
208 ret = clk_set_parent(formatter->sclk_sel, ts->iface->sclk); in axg_tdm_formatter_power_up()
298 formatter->sclk = devm_clk_get(dev, "sclk"); in axg_tdm_formatter_probe()
299 if (IS_ERR(formatter->sclk)) in axg_tdm_formatter_probe()
300 return dev_err_probe(dev, PTR_ERR(formatter->sclk), "failed to get sclk\n"); in axg_tdm_formatter_probe()
409 ret = clk_prepare_enable(ts->iface->sclk); in axg_tdm_stream_set_cont_clocks()
[all …]
/linux/drivers/power/reset/
A Dat91-poweroff.c55 struct clk *sclk; member
162 at91_shdwc.sclk = devm_clk_get(&pdev->dev, NULL); in at91_poweroff_probe()
163 if (IS_ERR(at91_shdwc.sclk)) in at91_poweroff_probe()
164 return PTR_ERR(at91_shdwc.sclk); in at91_poweroff_probe()
166 ret = clk_prepare_enable(at91_shdwc.sclk); in at91_poweroff_probe()
201 clk_disable_unprepare(at91_shdwc.sclk); in at91_poweroff_probe()
213 clk_disable_unprepare(at91_shdwc.sclk); in at91_poweroff_remove()
/linux/drivers/media/dvb-frontends/
A Dcx24110.c544 s32 afc; unsigned sclk; in cx24110_get_frontend() local
548 sclk = cx24110_readreg (state, 0x07) & 0x03; in cx24110_get_frontend()
551 if (sclk==0) sclk=90999000L/2L; in cx24110_get_frontend()
552 else if (sclk==1) sclk=60666000L; in cx24110_get_frontend()
553 else if (sclk==2) sclk=80888000L; in cx24110_get_frontend()
554 else sclk=90999000L; in cx24110_get_frontend()
555 sclk>>=8; in cx24110_get_frontend()
556 afc = sclk*(cx24110_readreg (state, 0x44)&0x1f)+ in cx24110_get_frontend()
557 ((sclk*cx24110_readreg (state, 0x45))>>8)+ in cx24110_get_frontend()
558 ((sclk*cx24110_readreg (state, 0x46))>>16); in cx24110_get_frontend()
/linux/drivers/clocksource/
A Dtimer-atmel-st.c185 struct clk *sclk; in atmel_st_timer_init() local
216 sclk = of_clk_get(node, 0); in atmel_st_timer_init()
217 if (IS_ERR(sclk)) { in atmel_st_timer_init()
219 return PTR_ERR(sclk); in atmel_st_timer_init()
222 ret = clk_prepare_enable(sclk); in atmel_st_timer_init()
228 sclk_rate = clk_get_rate(sclk); in atmel_st_timer_init()
/linux/sound/soc/cirrus/
A Dep93xx-i2s.c75 struct clk *sclk; member
102 clk_prepare_enable(info->sclk); in ep93xx_i2s_enable()
147 clk_disable_unprepare(info->sclk); in ep93xx_i2s_disable()
335 err = clk_set_rate(info->sclk, clk_get_rate(info->mclk) / sdiv); in ep93xx_i2s_hw_params()
339 err = clk_set_rate(info->lrclk, clk_get_rate(info->sclk) / lrdiv); in ep93xx_i2s_hw_params()
455 info->sclk = clk_get(&pdev->dev, "sclk"); in ep93xx_i2s_probe()
456 if (IS_ERR(info->sclk)) { in ep93xx_i2s_probe()
457 err = PTR_ERR(info->sclk); in ep93xx_i2s_probe()
483 clk_put(info->sclk); in ep93xx_i2s_probe()
495 clk_put(info->sclk); in ep93xx_i2s_remove()
/linux/Documentation/devicetree/bindings/rtc/
A Dmoxa,moxart-rtc.txt6 - rtc-sclk-gpios : RTC sclk gpio, with zero flags
14 rtc-sclk-gpios = <&gpio 5 0>;
/linux/Documentation/devicetree/bindings/clock/
A Dnvidia,tegra20-car.yaml46 "^(sclk)|(pll-[cem])$":
51 - nvidia,tegra20-sclk
52 - nvidia,tegra30-sclk
93 sclk {
94 compatible = "nvidia,tegra20-sclk";

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