| /linux/Documentation/devicetree/bindings/arm/amlogic/ |
| A D | amlogic,meson-gx-ao-secure.yaml | 5 $id: http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml# 15 secure firmware. 22 const: amlogic,meson-gx-ao-secure 30 - const: amlogic,meson-gx-ao-secure 34 - amlogic,a4-ao-secure 35 - amlogic,c3-ao-secure 36 - amlogic,s4-ao-secure 37 - amlogic,t7-ao-secure 38 - const: amlogic,meson-gx-ao-secure 58 ao-secure@140 { [all …]
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| A D | amlogic,meson-mx-secbus2.yaml | 16 The registers can be accessed directly when not running in "secure mode". 17 When "secure mode" is enabled then these registers have to be accessed 18 through secure monitor calls.
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| /linux/Documentation/devicetree/bindings/arm/ |
| A D | secure.txt | 15 can be supported by prefixing the property name with "secure-". So for 16 instance "secure-foo" would override "foo". For property names with 18 "vendor,secure-foo". If there is no "secure-" property then the Secure 21 validly have "secure-" versions; this list will be enlarged on a 39 in the secure world. The combination of this with "status" allows 41 specified. If "secure-status" is not specified it defaults to the 50 secure-status = "disabled"; /* NS-only */ 51 status = "okay"; secure-status = "disabled"; /* NS-only */ 52 status = "disabled"; secure-status = "okay"; /* S-only */ 56 The secure-chosen node [all …]
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| /linux/Documentation/devicetree/bindings/crypto/ |
| A D | inside-secure,safexcel.yaml | 4 $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml# 15 - const: inside-secure,safexcel-eip197b 16 - const: inside-secure,safexcel-eip197d 17 - const: inside-secure,safexcel-eip97ies 18 - const: inside-secure,safexcel-eip197 19 description: Equivalent of inside-secure,safexcel-eip197b 21 - const: inside-secure,safexcel-eip97 22 description: Equivalent of inside-secure,safexcel-eip97ies 75 compatible = "inside-secure,safexcel-eip197b";
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| /linux/Documentation/devicetree/bindings/mailbox/ |
| A D | ti,secure-proxy.yaml | 4 $id: http://devicetree.org/schemas/mailbox/ti,secure-proxy.yaml# 13 The Texas Instruments' secure proxy is a mailbox controller that has 25 const: ti,am654-secure-proxy 30 Contains the secure proxy thread ID used for the specific transfer path. 48 secure proxy thread in the form 'rx_<PID>'. 54 Contains the interrupt information for the Rx interrupt path for secure 71 compatible = "ti,am654-secure-proxy";
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| /linux/Documentation/arch/powerpc/ |
| A D | ultravisor.rst | 63 the VM it is returning to is secure. 102 that are running in secure mode can access secure memory. 161 passes control in secure mode. 243 When the secure pages are transferred back to secure memory, they may 473 of a secure virtual machine or if called from a 665 * U_INVALID if VM is not secure. 703 * U_INVALID if the VM is not secure. 752 * U_INVALID if VM is not secure. 766 yet, mark the PTE as secure and back it with a secure page when that 795 * U_INVAL if VM is not secure. [all …]
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| /linux/Documentation/devicetree/bindings/arm/samsung/ |
| A D | samsung-secure-firmware.yaml | 4 $id: http://devicetree.org/schemas/arm/samsung/samsung-secure-firmware.yaml# 15 - const: samsung,secure-firmware 19 Address of non-secure SYSRAM used for communication with firmware. 31 compatible = "samsung,secure-firmware";
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| /linux/Documentation/devicetree/bindings/nvmem/ |
| A D | st,stm32-romem.yaml | 40 st,non-secure-otp: 42 This property explicits a factory programmed area that both secure 43 and non-secure worlds can access. It is needed when, by default, the 44 related area can only be reached by the secure world. 69 st,non-secure-otp;
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| A D | amlogic,meson-gxbb-efuse.yaml | 27 secure-monitor: 28 description: phandle to the secure-monitor node 37 - secure-monitor 48 secure-monitor = <&sm>;
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| A D | qcom,sec-qfprom.yaml | 14 protected from non-secure access. In such situations, the OS have to use 15 secure calls to read the region. 30 - description: The secure qfprom corrected region.
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_ib.c | 138 bool secure, init_shadow; in amdgpu_ib_schedule() local 247 secure = false; in amdgpu_ib_schedule() 249 secure = ib->flags & AMDGPU_IB_FLAGS_SECURE; in amdgpu_ib_schedule() 250 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule() 257 if (secure != !!(ib->flags & AMDGPU_IB_FLAGS_SECURE)) { in amdgpu_ib_schedule() 258 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule() 259 secure = !secure; in amdgpu_ib_schedule() 260 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule() 269 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule()
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| /linux/Documentation/devicetree/bindings/thermal/ |
| A D | amlogic,thermal.yaml | 38 amlogic,ao-secure: 39 description: phandle to the ao-secure syscon 50 - amlogic,ao-secure 63 amlogic,ao-secure = <&sec_AO>;
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| /linux/Documentation/devicetree/bindings/iommu/ |
| A D | qcom,iommu.yaml | 16 to non-secure vs secure interrupt line. 50 qcom,iommu-secure-id: 53 The SCM secure ID of the IOMMU instance. 114 qcom,iommu-secure-id = <17>;
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| /linux/arch/arm/mach-omap2/ |
| A D | Makefile | 16 secure-common = omap-smc.o omap-secure.o 19 obj-$(CONFIG_ARCH_OMAP3) += $(omap-2-3-common) $(hwmod-common) $(secure-common) 20 obj-$(CONFIG_ARCH_OMAP4) += $(secure-common) 21 obj-$(CONFIG_SOC_AM33XX) += $(secure-common) 22 obj-$(CONFIG_SOC_OMAP5) += $(secure-common) 23 obj-$(CONFIG_SOC_AM43XX) += $(secure-common) 24 obj-$(CONFIG_SOC_DRA7XX) += $(secure-common)
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| /linux/Documentation/tee/ |
| A D | op-tee.rst | 23 separate secure co-processor. 56 RPC (Remote Procedure Call) are requests from secure world to kernel driver 74 There are two kinds of notifications that secure world can use to make 79 2. Asynchronous notifications delivered with a combination of a non-secure 80 edge-triggered interrupt and a fast call from the non-secure interrupt 84 this is only usable when secure world is entered with a yielding call via 85 ``OPTEE_SMC_CALL_WITH_ARG``. This excludes such notifications from secure 88 An asynchronous notification is delivered via a non-secure edge-triggered 98 building block for OP-TEE OS in secure world to implement the top half and
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| A D | tee.rst | 12 A TEE is a trusted OS running in some secure environment, for example, 13 TrustZone on ARM CPUs, or a separate secure co-processor etc. A TEE driver
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| /linux/Documentation/devicetree/bindings/rng/ |
| A D | omap_rng.yaml | 17 - inside-secure,safexcel-eip76 50 - inside-secure,safexcel-eip76 75 compatible = "inside-secure,safexcel-eip76";
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| /linux/arch/s390/crypto/ |
| A D | Kconfig | 22 SHA-384 and SHA-512 secure hash algorithms (FIPS 180) 33 SHA-1 secure hash algorithm (FIPS 180) 44 SHA-224 and SHA-256 secure hash algorithms (FIPS 180) 55 SHA3-224 and SHA3-256 secure hash algorithms (FIPS 202) 66 SHA3-384 and SHA3-512 secure hash algorithms (FIPS 202)
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| /linux/Documentation/devicetree/bindings/arm/tegra/ |
| A D | nvidia,tegra194-cbb.yaml | 59 CCPLEX receives secure or nonsecure interrupt depending on error type. 60 A secure interrupt is received for SEC(firewall) & SLV errors and a 61 non-secure interrupt is received for TMO & DEC errors. 63 - description: non-secure interrupt 64 - description: secure interrupt
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| /linux/arch/arm64/boot/dts/arm/ |
| A D | corstone1000.dtsi | 145 secure-status = "okay"; /* secure-world-only */ 157 secure-status = "okay"; /* secure-world-only */
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| /linux/Documentation/driver-api/firmware/ |
| A D | other_interfaces.rst | 25 higher than the kernel is granted. Such secure features include 31 drivers to request access to the secure features. The requests are queued 33 of the requests on to a secure monitor (EL3).
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| /linux/arch/mips/crypto/ |
| A D | Kconfig | 39 SHA-1 secure hash algorithm (FIPS 180) 49 SHA-224 and SHA-256 secure hash algorithms (FIPS 180) 59 SHA-384 and SHA-512 secure hash algorithms (FIPS 180)
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| /linux/arch/arm64/boot/dts/tesla/ |
| A D | fsd.dtsi | 379 <GIC_SPI 439 IRQ_TYPE_LEVEL_HIGH>, /* Global non-secure fault */ 380 <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>, /* Combined secure interrupt */ 386 /* Per context non-secure context interrupts, 0-3 interrupts */ 399 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, /* Global non-secure fault */ 400 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, /* Combined secure interrupt */ 410 /* Per context non-secure context interrupts, 0-7 interrupts */ 427 <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, /* Global non-secure fault */ 432 /* Per context non-secure context interrupts, 0-1 interrupts */ 443 <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, /* Global non-secure fault */ 444 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* Combined secure interrupt */ [all …]
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| /linux/arch/arm64/boot/dts/amlogic/ |
| A D | amlogic-a4-common.dtsi | 71 sec_ao: ao-secure@10220 { 72 compatible = "amlogic,a4-ao-secure", 73 "amlogic,meson-gx-ao-secure",
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| /linux/Documentation/devicetree/bindings/arm/aspeed/ |
| A D | aspeed,sbc.yaml | 15 The ASPEED SoCs have a register bank for interacting with the secure boot 34 sbc: secure-boot-controller@1e6f2000 {
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