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/linux/arch/arm/mach-spear/
A Dpl080.c26 } signals[16] = {{0, 0}, }; variable
36 if (signals[signal].busy && in pl080_get_signal()
37 (signals[signal].val != cd->muxval)) { in pl080_get_signal()
43 if (!signals[signal].busy) { in pl080_get_signal()
56 signals[signal].busy++; in pl080_get_signal()
57 signals[signal].val = cd->muxval; in pl080_get_signal()
70 if (!signals[signal].busy) in pl080_put_signal()
73 signals[signal].busy--; in pl080_put_signal()
/linux/tools/testing/selftests/arm64/fp/
A DREADME30 Terminated by signal 15, no error, iterations=9467, signals=1014
33 Terminated by signal 15, no error, iterations=9448, signals=1028
36 Terminated by signal 15, no error, iterations=9436, signals=1039
39 Terminated by signal 15, no error, iterations=9421, signals=1039
42 Terminated by signal 15, no error, iterations=9403, signals=1039
45 Terminated by signal 15, no error, iterations=9385, signals=1036
48 Terminated by signal 15, no error, iterations=9376, signals=1039
51 Terminated by signal 15, no error, iterations=9361, signals=1039
54 Terminated by signal 15, no error, iterations=9350, signals=1039
/linux/drivers/reset/
A Dreset-imx7.c25 const struct imx7_src_signal *signals; member
33 const struct imx7_src_signal *signals; member
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
95 const unsigned int bit = imx7src->signals[id].bit; in imx7_reset_set()
129 .signals = imx7_src_signals,
223 const unsigned int bit = imx7src->signals[id].bit; in imx8mq_reset_set()
265 .signals = imx8mq_src_signals,
318 const unsigned int bit = imx7src->signals[id].bit; in imx8mp_reset_set()
353 .signals = imx8mp_src_signals,
372 imx7src->signals = variant->signals; in imx7_reset_probe()
/linux/Documentation/devicetree/bindings/clock/
A Damlogic,axg-audio-clkc.yaml38 - description: input plls to generate clock signals N0
39 - description: input plls to generate clock signals N1
40 - description: input plls to generate clock signals N2
41 - description: input plls to generate clock signals N3
42 - description: input plls to generate clock signals N4
43 - description: input plls to generate clock signals N5
44 - description: input plls to generate clock signals N6
45 - description: input plls to generate clock signals N7
/linux/drivers/gpu/drm/i915/gt/
A Dintel_breadcrumbs.c100 if (!list_empty(&ce->signals)) in remove_signaling_context()
116 if (!list_is_last(&rq->signal_link, &ce->signals) && in check_signal_order()
121 if (!list_is_first(&rq->signal_link, &ce->signals) && in check_signal_order()
214 list_for_each_entry_rcu(rq, &ce->signals, signal_link) { in signal_irq_work()
367 if (list_empty(&ce->signals)) { in insert_breadcrumb()
370 pos = &ce->signals; in insert_breadcrumb()
386 list_for_each_prev(pos, &ce->signals) { in insert_breadcrumb()
468 if (list_empty(&ce->signals)) in intel_context_remove_breadcrumbs()
471 list_for_each_entry_safe(rq, rn, &ce->signals, signal_link) { in intel_context_remove_breadcrumbs()
501 list_for_each_entry_rcu(rq, &ce->signals, signal_link) in print_signals()
/linux/drivers/counter/
A Dinterrupt-cnt.c22 struct counter_signal signals; member
197 priv->signals.name = devm_kasprintf(dev, GFP_KERNEL, "IRQ %d", in interrupt_cnt_probe()
199 if (!priv->signals.name) in interrupt_cnt_probe()
202 counter->signals = &priv->signals; in interrupt_cnt_probe()
207 priv->synapses.signal = &priv->signals; in interrupt_cnt_probe()
/linux/drivers/gpu/drm/amd/display/dc/
A Ddc_dmub_srv.c1290 ips_fw->signals.bits.ips1_commit, in dc_dmub_srv_notify_idle()
1291 ips_fw->signals.bits.ips2_commit); in dc_dmub_srv_notify_idle()
1329 ips_driver->signals = new_signals; in dc_dmub_srv_notify_idle()
1337 ips_fw->signals.bits.ips1_commit, in dc_dmub_srv_notify_idle()
1338 ips_fw->signals.bits.ips2_commit); in dc_dmub_srv_notify_idle()
1373 ips_driver->signals.all = 0; in dc_dmub_srv_exit_low_power_state()
1381 ips_fw->signals.bits.ips1_commit, in dc_dmub_srv_exit_low_power_state()
1382 ips_fw->signals.bits.ips2_commit, in dc_dmub_srv_exit_low_power_state()
1394 ips_fw->signals.bits.ips2_commit || !ips_fw->signals.bits.in_idle)) { in dc_dmub_srv_exit_low_power_state()
1397 ips_fw->signals.bits.ips1_commit, in dc_dmub_srv_exit_low_power_state()
[all …]
/linux/tools/lib/subcmd/
A Dsigchain.c13 static struct sigchain_signal signals[SIGCHAIN_MAX_SIGNALS]; variable
23 struct sigchain_signal *s = signals + sig; in sigchain_push()
36 struct sigchain_signal *s = signals + sig; in sigchain_pop()
/linux/Documentation/trace/coresight/
A Dcoresight-ect.rst14 individual input and output hardware signals known as triggers to and from
50 The hardware trigger signals can also be connected to non-CoreSight devices
72 capable of generating or using trigger signals.::
100 Individual trigger connection information. This describes trigger signals for
108 * ``in_types`` : functional types for in signals.
109 * ``out_signals`` : output trigger signals for this connection.
110 * ``out_types`` : functional types for out signals.
127 If a connection has zero signals in either the 'in' or 'out' triggers then
177 * ``chan_free``: Show channels with no attached signals.
185 dangerous output signals to be set.
[all …]
/linux/Documentation/driver-api/
A Dhsi.rst15 The serial protocol uses two signals, DATA and FLAG as combined data and clock
16 signals and an additional READY signal for flow control. An additional WAKE
17 signal can be used to wakeup the chips from standby modes. The signals are
18 commonly prefixed by AC for signals going from the application die to the
19 cellular die and CA for signals going the other way around.
A Dptp.rst25 - Period output signals configurable from user space
99 - 3 Periodic signals (optional interrupt)
107 - GPIO outputs can produce periodic signals
119 - Programmable output periodic signals
131 periodic signals.
134 periodic signals.
/linux/tools/perf/tests/shell/
A Ddaemon.sh421 local signals=0
426 if [ ${signals} -eq 0 ]; then
428 signals=1
429 elif [ ${signals} -eq 1 ] && [ $files -ge 1 ]; then
431 signals=2
432 elif [ ${signals} -eq 2 ] && [ $files -ge 2 ]; then
434 signals=3
435 elif [ ${signals} -eq 3 ] && [ $files -ge 3 ]; then
/linux/drivers/tty/
A Dsynclink_gt.c722 info->signals |= SerialSignal_DTR; in set_termios()
724 info->signals |= SerialSignal_RTS; in set_termios()
1192 if (info->signals & SerialSignal_RI) in line_info()
1301 info->signals |= SerialSignal_RTS; in unthrottle()
1915 info->signals |= SerialSignal_DSR; in dsr_change()
1935 info->signals |= SerialSignal_CTS; in cts_change()
1970 info->signals |= SerialSignal_DCD; in dcd_change()
2007 info->signals |= SerialSignal_RI; in ri_change()
2010 info->signals &= ~SerialSignal_RI; in ri_change()
2667 s = info->signals; in wait_mgsl_event()
[all …]
/linux/Documentation/devicetree/bindings/gpio/
A Dsprd,gpio-eic.yaml24 connections. A debounce mechanism is used to capture the input signals'
32 The EIC-latch sub-module is used to latch some special power down signals
34 clock to capture signals.
36 The EIC-async sub-module uses a 32kHz clock to capture the short signals
41 when detecting input signals.
A Dnvidia,tegra186-gpio.yaml21 and read/write the value of, numerous GPIO signals. Routing of GPIO signals
35 b) GPIO registers, which allow manipulation of the GPIO signals. In some
60 Each GPIO controller can generate a number of interrupt signals. Each
62 ports. Thus, the number of interrupt signals generated by a controller
67 Each GPIO controller in fact generates multiple interrupts signals for
69 one of the interrupt signals generated by a set-of-ports. The intent is
72 The status of each of these per-port-set signals is reported via a
/linux/Documentation/devicetree/bindings/reset/
A Dreset.txt3 This binding is intended to represent the hardware reset signals present
4 internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
24 may be reset. Instead, reset signals should be represented in the DT node
27 block node for dedicated reset signals. The intent of this binding is to give
28 appropriate software access to the reset signals in order to manage the HW,
/linux/Documentation/gpu/amdgpu/display/
A Ddcn-overview.rst67 2. Global sync signals (green): It is a set of synchronization signals composed
70 4. Sideband signals: All other signals that do not fit the previous one.
72 These signals are essential and play an important role in DCN. Nevertheless,
197 These atomic register updates are driven by global sync signals in DCN. In
199 signals page flip and vblank events it is helpful to understand how global sync
202 Global sync consists of three signals, VSTARTUP, VUPDATE, and VREADY. These are
206 The global sync signals always happen during VBlank, are independent from the
210 or userspace clients as it signals the point at which hardware latches to
218 The below picture illustrates the global sync signals:
222 These signals affect core DCN behavior. Programming them incorrectly will lead
/linux/Documentation/devicetree/bindings/usb/
A Dbrcm,usb-pinmap.yaml22 description: Interrupt for signals mirrored to out-gpios.
27 description: Array of one or two GPIO pins used for input signals.
39 description: Array of one GPIO pin used for output signals.
/linux/Documentation/devicetree/bindings/display/panel/
A Dpanel-common.yaml96 # and timing of those control signals are device-specific and left for panel
98 # used for panels that implement compatible control signals.
107 signals (or active high power down signals) can be supported by inverting
118 while active. Active high reset signals can be supported by inverting the
125 The tearing effect signal is active high. Active low signals can be
143 # backlight control through GPIO, PWM or other signals connected to an external
/linux/Documentation/devicetree/bindings/media/i2c/
A Dtvp5150.txt4 (and also SECAM in the TVP5151 case) video signals to either 8-bit 4:2:2 YUV
55 - sdtv-standards: Set the possible signals to which the hardware tries to lock
67 sdtv-standards = <SDTV_STD_PAL_M>; /* limit to pal-m signals */
79 sdtv-standards = <SDTV_STD_NTSC_M>; /* limit to ntsc-m signals */
/linux/Documentation/devicetree/bindings/arm/
A Darm,coresight-cti.yaml19 output hardware trigger signals. CTIs can have a maximum number of input and
20 output hardware trigger signals (8 each for v1 CTI, 32 each for v2 CTI). The
30 In general the connections between CTI and components via the trigger signals
40 binding can be declared with no explicit trigger signals. This will result
57 signals to GEN_IO.
59 Note that some hardware trigger signals can be connected to non-CoreSight
133 A trigger connections child node which describes the trigger signals
171 signals. Types in this array match to the corresponding signal in the
188 signals. Types in this array match to the corresponding signal
197 List of CTI trigger out signals that will be blocked from becoming
/linux/arch/mips/kernel/
A Dentry.S85 # signals dont change between
129 # signals dont change between
138 work_notifysig: # deal with pending signals and
/linux/drivers/pinctrl/aspeed/
A Dpinctrl-aspeed.c266 char *signals = get_defined_signals(pdesc); in aspeed_pinmux_set_mux() local
269 pfunc->name, pdesc->name, pin, signals, in aspeed_pinmux_set_mux()
271 kfree(signals); in aspeed_pinmux_set_mux()
409 char *signals = get_defined_signals(pdesc); in aspeed_gpio_request_enable() local
412 pdesc->name, offset, signals); in aspeed_gpio_request_enable()
413 kfree(signals); in aspeed_gpio_request_enable()
/linux/tools/testing/selftests/timers/
A Dposix_timers.c225 int signals; member
234 tsig->signals++; in siginfo_handler()
335 ksft_test_result(tsig.signals == 1 && tsig.overruns == 29, in check_sig_ign()
338 ksft_test_result(tsig.signals == 0 && tsig.overruns == 0, in check_sig_ign()
396 ksft_test_result(!tsig.signals, "check_rearm\n"); in check_rearm()
444 ksft_test_result(!tsig.signals, "check_delete\n"); in check_delete()
599 ksft_test_result(tsig.signals == 1 && tsig.overruns == 9, in check_overrun()
/linux/Documentation/devicetree/bindings/leds/
A Dleds-bcm6328.yaml27 is usually 1:1 for hardware to LED signals, but through the activity/link
91 signals can get muxed into these LEDs. Only valid for LEDs 0 to 7,
92 where LED signals 0 to 3 may be muxed to LEDs 0 to 3, and signals 4 to
102 hardware signals can get muxed into these LEDs. Only valid for LEDs 0
103 to 7, where LED signals 0 to 3 may be muxed to LEDs 0 to 3, and
104 signals 4 to 7 may be muxed to LEDs 4 to 7. A signal can be muxed to

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