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Searched refs:slice_mask (Results 1 – 22 of 22) sorted by relevance

/linux/arch/powerpc/mm/book3s64/
A Dslice.c61 struct slice_mask *ret) in slice_range_to_mask()
389 const struct slice_mask *src) in slice_copy_mask()
398 const struct slice_mask *src1, in slice_or_mask()
399 const struct slice_mask *src2) in slice_or_mask()
427 struct slice_mask good_mask; in slice_get_unmapped_area()
428 struct slice_mask potential_mask; in slice_get_unmapped_area()
429 const struct slice_mask *maskp; in slice_get_unmapped_area()
686 struct slice_mask *mask; in slice_init_new_context_exec()
732 struct slice_mask mask; in slice_set_range_psize()
763 const struct slice_mask *maskp; in slice_is_hugepage_only_range()
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/linux/drivers/gpu/drm/i915/gt/
A Dintel_sseu.c156 sseu->slice_mask |= BIT(0); in gen11_compute_sseu_info()
172 sseu->slice_mask |= BIT(0); in xehp_compute_sseu_info()
333 sseu->slice_mask = BIT(0); in cherryview_sseu_info_init()
407 if (!(sseu->slice_mask & BIT(s))) in gen9_sseu_info_init()
586 sseu->slice_mask = BIT(0); in hsw_sseu_info_init()
590 sseu->slice_mask = BIT(0); in hsw_sseu_info_init()
786 hweight8(sseu->slice_mask), sseu->slice_mask); in intel_sseu_dump()
879 unsigned long slice_mask = 0; in intel_slicemask_from_xehp_dssmask() local
883 8 * sizeof(slice_mask)); in intel_slicemask_from_xehp_dssmask()
888 slice_mask |= BIT(i); in intel_slicemask_from_xehp_dssmask()
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A Dintel_sseu_debugfs.c36 sseu->slice_mask = BIT(0); in cherryview_sseu_device_status()
87 sseu->slice_mask |= BIT(s); in gen11_sseu_device_status()
140 sseu->slice_mask |= BIT(s); in gen9_sseu_device_status()
175 sseu->slice_mask = slice_info & GEN8_LSLICESTAT_MASK; in bdw_sseu_device_status()
177 if (sseu->slice_mask) { in bdw_sseu_device_status()
179 for (s = 0; s < fls(sseu->slice_mask); s++) in bdw_sseu_device_status()
185 for (s = 0; s < fls(sseu->slice_mask); s++) { in bdw_sseu_device_status()
201 sseu->slice_mask); in i915_print_sseu_info()
203 hweight8(sseu->slice_mask)); in i915_print_sseu_info()
A Dintel_sseu.h69 u8 slice_mask; member
102 u8 slice_mask; member
112 .slice_mask = sseu->slice_mask, in intel_sseu_from_device_info()
A Dintel_workarounds.c1127 slice = ffs(sseu->slice_mask) - 1; in gen9_wa_init_mcr()
1276 GEM_BUG_ON(hweight8(sseu->slice_mask) > 1); in icl_wa_init_mcr()
1304 unsigned long slice, subslice = 0, slice_mask = 0; in xehp_init_mcr() local
1335 slice_mask = intel_slicemask_from_xehp_dssmask(sseu->subslice_mask, in xehp_init_mcr()
1349 if (slice_mask & lncf_mask) { in xehp_init_mcr()
1350 slice_mask &= lncf_mask; in xehp_init_mcr()
1355 if (slice_mask & gt->info.mslice_mask) { in xehp_init_mcr()
1356 slice_mask &= gt->info.mslice_mask; in xehp_init_mcr()
1360 slice = __ffs(slice_mask); in xehp_init_mcr()
/linux/arch/powerpc/include/asm/book3s/64/
A Dmmu-hash.h708 struct slice_mask { struct
721 struct slice_mask mask_64k; argument
723 struct slice_mask mask_4k;
725 struct slice_mask mask_16m;
726 struct slice_mask mask_16g;
A Dmmu.h169 static inline struct slice_mask *slice_mask_for_size(mm_context_t *ctx, int psize) in slice_mask_for_size()
/linux/drivers/crypto/intel/qat/qat_common/
A Dicp_qat_fw_loader_handle.h19 unsigned int slice_mask; member
A Dqat_hal.c798 handle->hal_handle->slice_mask = hw_data->accel_mask; in qat_hal_chip_init()
/linux/drivers/gpu/drm/i915/gem/
A Di915_gem_context.c1002 if (sseu.slice_mask && !WARN_ON(ce->engine->class != RENDER_CLASS)) in intel_context_set_gem()
1917 if (!user->slice_mask || !user->subslice_mask || in i915_gem_user_to_context_sseu()
1929 if (overflows_type(user->slice_mask, context->slice_mask) || in i915_gem_user_to_context_sseu()
1938 if (user->slice_mask & ~device->slice_mask) in i915_gem_user_to_context_sseu()
1947 context->slice_mask = user->slice_mask; in i915_gem_user_to_context_sseu()
1954 unsigned int hw_s = hweight8(device->slice_mask); in i915_gem_user_to_context_sseu()
1956 unsigned int req_s = hweight8(context->slice_mask); in i915_gem_user_to_context_sseu()
2517 user_sseu.slice_mask = ce->sseu.slice_mask; in get_sseu()
/linux/drivers/gpu/drm/i915/
A Di915_query.c42 BUILD_BUG_ON(sizeof(u8) != sizeof(sseu->slice_mask)); in fill_topology_info()
47 slice_length = sizeof(sseu->slice_mask); in fill_topology_info()
73 &sseu->slice_mask, slice_length)) in fill_topology_info()
A Di915_getparam.c172 value = sseu->slice_mask; in i915_getparam_ioctl()
A Di915_perf.c3168 out_sseu->slice_mask = 0x1; in get_default_sseu_config()
/linux/drivers/gpu/drm/i915/display/
A Dskl_watermark.c528 hweight8(DISPLAY_INFO(i915)->dbuf.slice_mask); in intel_dbuf_slice_size()
537 if (!slice_mask) { in skl_ddb_entry_for_slices()
543 ddb->start = (ffs(slice_mask) - 1) * slice_size; in skl_ddb_entry_for_slices()
544 ddb->end = fls(slice_mask) * slice_size; in skl_ddb_entry_for_slices()
554 if (slice_mask & (BIT(DBUF_S1) | BIT(DBUF_S2))) in mbus_ddb_offset()
555 slice_mask = BIT(DBUF_S1); in mbus_ddb_offset()
557 slice_mask = BIT(DBUF_S3); in mbus_ddb_offset()
569 u8 slice_mask = 0; in skl_ddb_dbuf_slice_mask() local
582 slice_mask |= BIT(start_slice); in skl_ddb_dbuf_slice_mask()
586 return slice_mask; in skl_ddb_dbuf_slice_mask()
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A Dintel_display_device.c589 .dbuf.slice_mask = BIT(DBUF_S1),
718 .dbuf.slice_mask = BIT(DBUF_S1), \
777 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
864 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
1024 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \
1183 .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \
A Dintel_display_device.h238 u8 slice_mask; member
A Dintel_display_power.c1061 u8 slice_mask = DISPLAY_INFO(dev_priv)->dbuf.slice_mask; in gen9_dbuf_slices_update() local
1064 drm_WARN(&dev_priv->drm, req_slices & ~slice_mask, in gen9_dbuf_slices_update()
1066 req_slices, slice_mask); in gen9_dbuf_slices_update()
A Dintel_display.h115 for_each_if(DISPLAY_INFO(__dev_priv)->dbuf.slice_mask & BIT(__slice))
/linux/drivers/gpu/drm/i915/gem/selftests/
A Di915_gem_context.c1169 unsigned int slices = hweight32(ce->engine->sseu.slice_mask); in __sseu_finish()
1226 hweight32(sseu.slice_mask), spin); in __sseu_test()
1271 if (hweight32(engine->sseu.slice_mask) < 2) in __igt_ctx_sseu()
1282 pg_sseu.slice_mask = 1; in __igt_ctx_sseu()
1288 hweight32(engine->sseu.slice_mask), in __igt_ctx_sseu()
1289 hweight32(pg_sseu.slice_mask)); in __igt_ctx_sseu()
/linux/tools/include/uapi/drm/
A Di915_drm.h2218 __u64 slice_mask; member
/linux/include/uapi/drm/
A Di915_drm.h2218 __u64 slice_mask; member
/linux/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc_ads.c900 hweight8(gt->info.sseu.slice_mask)); in __guc_ads_init()

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