Searched refs:speedbin (Results 1 – 12 of 12) sorted by relevance
| /linux/drivers/cpufreq/ |
| A D | qcom-cpufreq-nvmem.c | 76 u8 *speedbin; in qcom_cpufreq_simple_get_version() local
80 if (IS_ERR(speedbin)) in qcom_cpufreq_simple_get_version()
85 kfree(speedbin); in qcom_cpufreq_simple_get_version()
174 u8 *speedbin; in qcom_cpufreq_kryo_name_version() local
211 kfree(speedbin); in qcom_cpufreq_kryo_name_version()
221 u8 *speedbin; in qcom_cpufreq_krait_name_version() local
250 kfree(speedbin); in qcom_cpufreq_krait_name_version()
261 u8 *speedbin; in qcom_cpufreq_ipq8064_name_version() local
305 kfree(speedbin); in qcom_cpufreq_ipq8064_name_version()
316 u8 *speedbin; in qcom_cpufreq_ipq6018_name_version() local
[all …]
|
| A D | sun50i-cpufreq-nvmem.c | 28 u32 (*efuse_xlate)(u32 speedbin);
31 static u32 sun50i_h6_efuse_xlate(u32 speedbin) in sun50i_h6_efuse_xlate() argument
35 efuse_value = (speedbin >> NVMEM_SHIFT) & NVMEM_MASK; in sun50i_h6_efuse_xlate()
62 static u32 sun50i_h616_efuse_xlate(u32 speedbin) in sun50i_h616_efuse_xlate() argument
67 switch (speedbin & 0xffff) { in sun50i_h616_efuse_xlate()
99 speedbin & 0xffff); in sun50i_h616_efuse_xlate()
170 u32 *speedbin; in sun50i_cpufreq_get_efuse() local
195 if (IS_ERR(speedbin)) in sun50i_cpufreq_get_efuse()
196 return PTR_ERR(speedbin); in sun50i_cpufreq_get_efuse()
198 ret = opp_data->efuse_xlate(*speedbin); in sun50i_cpufreq_get_efuse()
[all …]
|
| /linux/Documentation/devicetree/bindings/opp/ |
| A D | opp-v2-kryo-cpu.yaml | 20 defines the voltage and frequency value based on the speedbin blown in
37 speedbin that is used to select the right frequency/voltage
58 0: MSM8996, speedbin 0
59 1: MSM8996, speedbin 1
60 2: MSM8996, speedbin 2
61 3: MSM8996, speedbin 3
64 Bitmap for MSM8996SG format (speedbin shifted of 4 left):
66 4: MSM8996SG, speedbin 0
67 5: MSM8996SG, speedbin 1
68 6: MSM8996SG, speedbin 2
[all …]
|
| A D | allwinner,sun50i-h6-operating-points.yaml | 17 on the speedbin blown in the efuse combination.
31 register that has information about the speedbin that is used
|
| /linux/drivers/gpu/drm/msm/adreno/ |
| A D | adreno_gpu.c | 335 *value |= ((uint64_t) adreno_gpu->speedbin) << 32; in adreno_get_param()
1068 int adreno_read_speedbin(struct device *dev, u32 *speedbin) in adreno_read_speedbin() argument
1070 return nvmem_cell_read_variable_le_u32(dev, "speed_bin", speedbin); in adreno_read_speedbin()
1082 u32 speedbin; in adreno_gpu_init() local
1110 if (adreno_read_speedbin(dev, &speedbin) || !speedbin) in adreno_gpu_init()
1111 speedbin = 0xffff; in adreno_gpu_init()
1112 adreno_gpu->speedbin = (uint16_t) (0xffff & speedbin); in adreno_gpu_init()
|
| A D | adreno_gpu.h | 82 uint16_t speedbin; member
163 uint16_t speedbin; member
605 int adreno_read_speedbin(struct device *dev, u32 *speedbin);
|
| A D | a6xx_gpu.c | 2122 return BIT(info->speedbins[i].speedbin); in fuse_to_supp_hw()
2130 u32 speedbin; in a6xx_set_supported_hw() local
2133 ret = adreno_read_speedbin(dev, &speedbin); in a6xx_set_supported_hw()
2146 supp_hw = fuse_to_supp_hw(info, speedbin); in a6xx_set_supported_hw()
2151 speedbin); in a6xx_set_supported_hw()
|
| /linux/arch/arm/boot/dts/qcom/ |
| A D | qcom-msm8226.dtsi | 134 /* Higher CPU frequencies need speedbin support */
|
| A D | qcom-ipq8064.dtsi | 380 speedbin_efuse: speedbin@c0 {
|
| /linux/arch/arm64/boot/dts/qcom/ |
| A D | qcs404.dtsi | 376 cpr_efuse_speedbin: speedbin@13c {
|
| A D | msm8996.dtsi | 769 speedbin_efuse: speedbin@133 {
|
| /linux/arch/arm64/boot/dts/mediatek/ |
| A D | mt8186.dtsi | 1716 gpu_speedbin: gpu-speedbin@59c {
|
Completed in 33 milliseconds