Searched refs:stvec (Results 1 – 4 of 4) sorted by relevance
74 unsigned long stvec; member
337 vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(stvec), (unsigned long)guest_unexp_trap); in vm_arch_vcpu_add()431 vcpu_set_reg(vcpu, RISCV_GENERAL_CSR_REG(stvec), (unsigned long)&exception_vectors); in vcpu_init_vector_tables()
267 case KVM_REG_RISCV_CSR_REG(stvec): in general_csr_id_to_str()268 return RISCV_CSR_GENERAL(stvec); in general_csr_id_to_str()717 … KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CSR | KVM_REG_RISCV_CSR_GENERAL | KVM_REG_RISCV_CSR_REG(stvec),
2841 0x80x0 0000 0300 0002 stvec Supervisor trap vector base
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