Home
last modified time | relevance | path

Searched refs:subslice (Results 1 – 8 of 8) sorted by relevance

/linux/drivers/gpu/drm/i915/gt/
A Dintel_sseu.h123 int subslice) in intel_sseu_has_subslice() argument
126 subslice >= sseu->max_subslices) in intel_sseu_has_subslice()
130 return test_bit(subslice, sseu->subslice_mask.xehp); in intel_sseu_has_subslice()
132 return sseu->subslice_mask.hsw[slice] & BIT(subslice); in intel_sseu_has_subslice()
A Dintel_workarounds.c1111 unsigned int slice, subslice; in gen9_wa_init_mcr() local
1130 GEM_BUG_ON(!subslice); in gen9_wa_init_mcr()
1131 subslice--; in gen9_wa_init_mcr()
1239 unsigned int slice, unsigned int subslice) in __set_mcr_steering() argument
1259 unsigned int slice, unsigned int subslice) in __add_mcr_wa() argument
1264 gt->default_steering.instanceid = subslice; in __add_mcr_wa()
1273 unsigned int subslice; in icl_wa_init_mcr() local
1294 if (gt->info.l3bank_mask & BIT(subslice)) in icl_wa_init_mcr()
1297 __add_mcr_wa(gt, wal, 0, subslice); in icl_wa_init_mcr()
1304 unsigned long slice, subslice = 0, slice_mask = 0; in xehp_init_mcr() local
[all …]
A Dintel_sseu.c48 int subslice) in sseu_get_eus() argument
52 return sseu->eu_mask.xehp[subslice]; in sseu_get_eus()
54 return sseu->eu_mask.hsw[slice][subslice]; in sseu_get_eus()
58 static void sseu_set_eus(struct sseu_dev_info *sseu, int slice, int subslice, in sseu_set_eus() argument
64 sseu->eu_mask.xehp[subslice] = eu_mask; in sseu_set_eus()
66 sseu->eu_mask.hsw[slice][subslice] = eu_mask; in sseu_set_eus()
A Dintel_gt_regs.h76 #define GEN8_MCR_SUBSLICE(subslice) (((subslice) & 3) << 24) argument
81 #define GEN11_MCR_SUBSLICE(subslice) (((subslice) & 0x7) << 24) argument
509 #define GEN9_PGCTL_SS_ACK(subslice) (1 << (2 + (subslice) * 2)) argument
A Dintel_engine_cs.c1778 int subslice; in intel_engine_get_instdone() local
1799 for_each_ss_steering(iter, engine->gt, slice, subslice) { in intel_engine_get_instdone()
1800 instdone->sampler[slice][subslice] = in intel_engine_get_instdone()
1803 slice, subslice); in intel_engine_get_instdone()
1804 instdone->row[slice][subslice] = in intel_engine_get_instdone()
1807 slice, subslice); in intel_engine_get_instdone()
1811 for_each_ss_steering(iter, engine->gt, slice, subslice) in intel_engine_get_instdone()
1812 instdone->geom_svg[slice][subslice] = in intel_engine_get_instdone()
1815 slice, subslice); in intel_engine_get_instdone()
/linux/drivers/gpu/drm/i915/
A Di915_gpu_error.c444 int subslice; in error_print_instdone() local
459 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
461 slice, subslice, in error_print_instdone()
462 ee->instdone.sampler[slice][subslice]); in error_print_instdone()
464 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
466 slice, subslice, in error_print_instdone()
467 ee->instdone.row[slice][subslice]); in error_print_instdone()
473 for_each_ss_steering(iter, ee->engine->gt, slice, subslice) in error_print_instdone()
475 slice, subslice, in error_print_instdone()
476 ee->instdone.geom_svg[slice][subslice]); in error_print_instdone()
/linux/drivers/gpu/drm/i915/gt/uc/
A Dintel_guc_capture.c296 int slice, subslice, iter, i, num_steer_regs, num_tot_regs = 0; in guc_capture_alloc_steered_lists() local
316 for_each_ss_steering(iter, gt, slice, subslice) in guc_capture_alloc_steered_lists()
333 for_each_ss_steering(iter, gt, slice, subslice) { in guc_capture_alloc_steered_lists()
335 __fill_ext_reg(extarray, &gen8_extregs[i], slice, subslice); in guc_capture_alloc_steered_lists()
341 __fill_ext_reg(extarray, &xehpg_extregs[i], slice, subslice); in guc_capture_alloc_steered_lists()
/linux/drivers/gpu/drm/xe/regs/
A Dxe_gt_regs.h54 #define MCR_SUBSLICE(subslice) REG_FIELD_PREP(MCR_SUBSLICE_MASK, subslice) argument

Completed in 32 milliseconds