Searched refs:tbl_hdr (Results 1 – 4 of 4) sorted by relevance
360 sz = sizeof(control->tbl_hdr) - sizeof(control->tbl_hdr.checksum); in __calc_hdr_byte_sum()361 pp = (u8 *) &control->tbl_hdr; in __calc_hdr_byte_sum()747 control->tbl_hdr.header = RAS_TABLE_HDR_BAD; in amdgpu_ras_eeprom_update_header()767 control->tbl_hdr.checksum = 0; in amdgpu_ras_eeprom_update_header()773 control->tbl_hdr.tbl_size); in amdgpu_ras_eeprom_update_header()817 control->tbl_hdr.checksum = csum; in amdgpu_ras_eeprom_update_header()1125 control->tbl_hdr.header, in amdgpu_ras_debugfs_table_read()1126 control->tbl_hdr.version, in amdgpu_ras_debugfs_table_read()1127 control->tbl_hdr.first_rec_offset, in amdgpu_ras_debugfs_table_read()1128 control->tbl_hdr.tbl_size, in amdgpu_ras_debugfs_table_read()[all …]
62 struct amdgpu_ras_eeprom_table_header tbl_hdr; member
1725 return sysfs_emit(buf, "table version: 0x%x\n", con->eeprom_control.tbl_hdr.version); in amdgpu_ras_sysfs_version_show()
779 struct hfi_queue_table_header *tbl_hdr; in venus_interface_queues_init() local815 tbl_hdr = hdev->ifaceq_table.kva; in venus_interface_queues_init()816 tbl_hdr->version = 0; in venus_interface_queues_init()817 tbl_hdr->size = IFACEQ_TABLE_SIZE; in venus_interface_queues_init()820 tbl_hdr->num_q = IFACEQ_NUM; in venus_interface_queues_init()821 tbl_hdr->num_active_q = IFACEQ_NUM; in venus_interface_queues_init()1737 tbl_hdr = hdev->ifaceq_table.kva; in venus_hfi_queues_reinit()1738 tbl_hdr->version = 0; in venus_hfi_queues_reinit()1739 tbl_hdr->size = IFACEQ_TABLE_SIZE; in venus_hfi_queues_reinit()1742 tbl_hdr->num_q = IFACEQ_NUM; in venus_hfi_queues_reinit()[all …]
Completed in 22 milliseconds