| /linux/block/ |
| A D | blk-throttle.c | 85 if (tg) in sq_to_td() 147 qn->tg = tg; in throtl_qnode_init() 243 tg = kzalloc_node(sizeof(*tg), gfp, disk->node_id); in throtl_pd_alloc() 244 if (!tg) in throtl_pd_alloc() 256 throtl_qnode_init(&tg->qnode_on_self[rw], tg); in throtl_pd_alloc() 257 throtl_qnode_init(&tg->qnode_on_parent[rw], tg); in throtl_pd_alloc() 271 kfree(tg); in throtl_pd_alloc() 339 kfree(tg); in throtl_pd_free() 366 if (!tg) in update_min_dispatch_time() 1026 if (tg) in throtl_pending_timer_fn() [all …]
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| A D | blk-throttle.h | 32 struct throtl_grp *tg; /* tg this qnode belongs to */ member 162 struct throtl_grp *tg; in blk_should_throtl() local 173 tg = blkg_to_tg(bio->bi_blkg); in blk_should_throtl() 177 blkg_rwstat_add(&tg->stat_bytes, bio->bi_opf, in blk_should_throtl() 180 blkg_rwstat_add(&tg->stat_ios, bio->bi_opf, 1); in blk_should_throtl() 184 if (tg->has_rules_iops[rw]) in blk_should_throtl() 187 if (tg->has_rules_bps[rw] && !bio_flagged(bio, BIO_BPS_THROTTLED)) in blk_should_throtl()
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| A D | dce110_timing_generator.h | 117 #define DCE110TG_FROM_TG(tg)\ argument 128 struct timing_generator *tg, 136 struct timing_generator *tg, 154 struct timing_generator *tg, 170 struct timing_generator *tg, 179 struct timing_generator *tg, 185 struct timing_generator *tg, 202 struct timing_generator *tg, 208 struct timing_generator *tg, 212 struct timing_generator *tg, [all …]
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| A D | dce110_timing_generator.c | 66 struct timing_generator *tg, in dce110_timing_generator_apply_front_porch_workaround() argument 146 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, true); in dce110_timing_generator_enable_crtc() 217 tg->funcs->wait_for_vblank(tg); 218 tg->funcs->wait_for_vactive(tg); 238 result = tg->bp->funcs->enable_crtc(tg->bp, tg110->controller_id, false); in dce110_timing_generator_disable_crtc() 271 dm_write_reg(tg->ctx, in program_horz_count_by_2() 342 result = tg->bp->funcs->program_crtc_timing(tg->bp, &bp_params); in dce110_timing_generator_program_timing_generator() 590 tg, &position); in dce110_timing_generator_get_crtc_scanoutpos() 1399 tg->funcs->get_position(tg, &position1); in dce110_timing_generator_is_counter_moving() 1400 tg->funcs->get_position(tg, &position2); in dce110_timing_generator_is_counter_moving() [all …]
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| A D | dce110_timing_generator_v.c | 42 tg->ctx->logger 64 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc() 74 dm_write_reg(tg->ctx, in dce110_timing_generator_v_enable_crtc() 84 value = dm_read_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc() 90 dm_write_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc() 140 struct timing_generator *tg) in dce110_timing_generator_v_is_in_vertical_blank() argument 242 struct timing_generator *tg, in dce110_timing_generator_v_program_blanking() argument 384 struct timing_generator *tg, in dce110_timing_generator_v_enable_advanced_request() argument 478 struct timing_generator *tg, in dce110_timing_generator_v_set_overscan_color_black() argument 614 struct timing_generator *tg) in dce110_timing_generator_v_did_triggered_reset_occur() argument [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| A D | timing_generator.h | 190 bool (*enable_crtc)(struct timing_generator *tg); 201 struct timing_generator *tg, 215 void (*set_blank)(struct timing_generator *tg, 217 bool (*is_blanked)(struct timing_generator *tg); 220 void (*set_colors)(struct timing_generator *tg, 228 void (*unlock)(struct timing_generator *tg); 229 void (*lock)(struct timing_generator *tg); 250 struct timing_generator *tg, 269 void (*tg_init)(struct timing_generator *tg); 294 bool (*get_crc)(struct timing_generator *tg, [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dce120/ |
| A D | dce120_timing_generator.c | 91 tg->ctx, in dce120_timing_generator_is_in_vertical_blank() 114 tg, in dce120_timing_generator_validate_timing() 174 tg->ctx, in dce120_timing_generator_get_vblank_counter() 190 tg->ctx, in dce120_timing_generator_get_crtc_position() 217 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vblank() 224 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vblank() 235 if (!tg->funcs->is_counter_moving(tg)) { in dce120_timing_generator_wait_for_vactive() 375 tg->ctx, in dce120_timing_generator_did_triggered_reset_occur() 529 tg->ctx, in dce120_timing_generator_set_overscan_color_black() 676 tg->ctx, in dce120_tg_program_blank_color() [all …]
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| /linux/kernel/sched/ |
| A D | autogroup.h | 14 struct task_group *tg; member 21 extern void autogroup_free(struct task_group *tg); 23 static inline bool task_group_is_autogroup(struct task_group *tg) in task_group_is_autogroup() argument 25 return !!tg->autogroup; in task_group_is_autogroup() 31 autogroup_task_group(struct task_struct *p, struct task_group *tg) in autogroup_task_group() argument 36 if (enabled && task_wants_autogroup(p, tg)) in autogroup_task_group() 37 return p->signal->autogroup->tg; in autogroup_task_group() 39 return tg; in autogroup_task_group() 47 static inline void autogroup_free(struct task_group *tg) { } in autogroup_free() argument 48 static inline bool task_group_is_autogroup(struct task_group *tg) in task_group_is_autogroup() argument [all …]
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| A D | autogroup.c | 43 kfree(tg->autogroup); in autogroup_free() 52 ag->tg->rt_se = NULL; in autogroup_destroy() 53 ag->tg->rt_rq = NULL; in autogroup_destroy() 55 sched_release_group(ag->tg); in autogroup_destroy() 56 sched_destroy_group(ag->tg); in autogroup_destroy() 87 struct task_group *tg; in autogroup_create() local 93 if (IS_ERR(tg)) in autogroup_create() 99 ag->tg = tg; in autogroup_create() 108 free_rt_sched_group(tg); in autogroup_create() 112 tg->autogroup = ag; in autogroup_create() [all …]
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| A D | ext.h | 73 int scx_tg_online(struct task_group *tg); 74 void scx_tg_offline(struct task_group *tg); 79 void scx_group_set_weight(struct task_group *tg, unsigned long cgrp_weight); 80 void scx_group_set_idle(struct task_group *tg, bool idle); 82 static inline int scx_tg_online(struct task_group *tg) { return 0; } in scx_tg_online() argument 83 static inline void scx_tg_offline(struct task_group *tg) {} in scx_tg_offline() argument 88 static inline void scx_group_set_weight(struct task_group *tg, unsigned long cgrp_weight) {} in scx_group_set_weight() argument 89 static inline void scx_group_set_idle(struct task_group *tg, bool idle) {} in scx_group_set_idle() argument
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| A D | rt.c | 197 if (tg->rt_se) in unregister_rt_sched_group() 206 if (tg->rt_rq) in free_rt_sched_group() 208 if (tg->rt_se) in free_rt_sched_group() 225 rt_rq->tg = tg; in init_tg_rt_entry() 250 if (!tg->rt_rq) in alloc_rt_sched_group() 253 if (!tg->rt_se) in alloc_rt_sched_group() 503 tg = list_entry_rcu(tg->list.next, in next_task_group() 508 tg = NULL; in next_task_group() 510 return tg; in next_task_group() 2713 if (tg == d->tg) { in tg_rt_schedulable() [all …]
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| A D | core.c | 4753 tg = autogroup_task_group(p, tg); in sched_cgroup_fork() 8809 autogroup_free(tg); in sched_free_group() 8835 if (!tg) in sched_create_group() 8847 return tg; in sched_create_group() 8919 tg = autogroup_task_group(tsk, tg); in sched_get_task_group() 8921 return tg; in sched_get_task_group() 8999 if (IS_ERR(tg)) in cpu_cgroup_css_alloc() 9002 return &tg->css; in cpu_cgroup_css_alloc() 9513 if (tg == d->tg) { in normalize_cfs_quota() 9534 if (!tg->parent) { in tg_cfs_schedulable_down() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| A D | dce60_timing_generator.c | 91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur() 92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur() 105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur() 119 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing() 125 struct timing_generator *tg, in dce60_timing_generator_enable_advanced_request() argument 131 uint32_t value = dm_read_reg(tg->ctx, addr); in dce60_timing_generator_enable_advanced_request() 134 uint32_t value2 = dm_read_reg(tg->ctx, addr2); in dce60_timing_generator_enable_advanced_request() 175 dm_write_reg(tg->ctx, addr, value); in dce60_timing_generator_enable_advanced_request() 176 dm_write_reg(tg->ctx, addr2, value2); in dce60_timing_generator_enable_advanced_request() 187 value = dm_read_reg(tg->ctx, addr); in dce60_is_tg_enabled() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| A D | dcn35_hwseq.c | 225 if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) { in dcn35_init_hw() 725 tg->funcs->lock(tg); in dcn35_init_pipes() 727 tg->funcs->lock(tg); in dcn35_init_pipes() 728 tg->funcs->set_blank(tg, true); in dcn35_init_pipes() 781 tg->funcs->tg_init(tg); in dcn35_init_pipes() 792 pipe_ctx->stream_res.tg = tg; in dcn35_init_pipes() 809 if (tg->funcs->is_tg_enabled(tg)) in dcn35_init_pipes() 810 tg->funcs->unlock(tg); in dcn35_init_pipes() 819 tg->funcs->init_odm(tg); in dcn35_init_pipes() 822 tg->funcs->tg_init(tg); in dcn35_init_pipes() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| A D | dcn10_hwseq.c | 109 tg = pipe_ctx->stream_res.tg; in dcn10_lock_all_pipes() 118 !tg->funcs->is_tg_enabled(tg) || in dcn10_lock_all_pipes() 1385 tg->funcs->lock(tg); in dcn10_init_pipes() 1387 tg->funcs->lock(tg); in dcn10_init_pipes() 1388 tg->funcs->set_blank(tg, true); in dcn10_init_pipes() 1441 tg->funcs->tg_init(tg); in dcn10_init_pipes() 1452 pipe_ctx->stream_res.tg = tg; in dcn10_init_pipes() 1470 tg->funcs->unlock(tg); in dcn10_init_pipes() 1479 tg->funcs->init_odm(tg); in dcn10_init_pipes() 1482 tg->funcs->tg_init(tg); in dcn10_init_pipes() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/ |
| A D | dcn201_hwseq.c | 180 tg->funcs->get_otg_active_size(tg, in dcn201_init_blank() 185 tg->funcs->get_optc_source(tg, &num_opps, &opp_id_src0, &opp_id_src1); in dcn201_init_blank() 275 if (tg->funcs->is_tg_enabled(tg)) { in dcn201_init_hw() 283 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw() 284 tg->funcs->lock(tg); in dcn201_init_hw() 310 pipe_ctx->stream_res.tg = tg; in dcn201_init_hw() 336 if (tg->funcs->is_tg_enabled(tg)) in dcn201_init_hw() 337 tg->funcs->unlock(tg); in dcn201_init_hw() 352 tg->funcs->tg_init(tg); in dcn201_init_hw() 547 pipe->stream_res.tg->funcs->lock(pipe->stream_res.tg); in dcn201_pipe_control_lock() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/dce80/ |
| A D | dce80_timing_generator.c | 87 static void program_pix_dur(struct timing_generator *tg, uint32_t pix_clk_100hz) in program_pix_dur() argument 91 + DCE110TG_FROM_TG(tg)->offsets.dmif; in program_pix_dur() 92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur() 105 dm_write_reg(tg->ctx, addr, value); in program_pix_dur() 108 static void program_timing(struct timing_generator *tg, in program_timing() argument 119 program_pix_dur(tg, timing->pix_clk_100hz); in program_timing() 121 dce110_tg_program_timing(tg, timing, 0, 0, 0, 0, 0, 0, use_vbios); in program_timing() 125 struct timing_generator *tg, in dce80_timing_generator_enable_advanced_request() argument 129 struct dce110_timing_generator *tg110 = DCE110TG_FROM_TG(tg); in dce80_timing_generator_enable_advanced_request() 131 uint32_t value = dm_read_reg(tg->ctx, addr); in dce80_timing_generator_enable_advanced_request() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn20/ |
| A D | dcn20_hwseq.c | 413 tg->funcs->get_otg_active_size(tg, in dcn20_init_blank() 748 if (tg && tg->funcs->disable_phantom_crtc) in dcn20_disable_plane() 749 tg->funcs->disable_phantom_crtc(tg); in dcn20_disable_plane() 2076 tg->funcs->enable_crtc(tg); in dcn20_program_front_end_for_ctx() 3107 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw() 3114 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw() 3115 tg->funcs->lock(tg); in dcn20_fpga_init_hw() 3141 pipe_ctx->stream_res.tg = tg; in dcn20_fpga_init_hw() 3169 if (tg->funcs->is_tg_enabled(tg)) in dcn20_fpga_init_hw() 3170 tg->funcs->unlock(tg); in dcn20_fpga_init_hw() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| A D | dce110_hwseq.c | 671 struct timing_generator *tg = pipe_ctx->stream_res.tg; in dce110_enable_stream() local 689 tg->funcs->set_early_control(tg, early_control); in dce110_enable_stream() 1777 tg->funcs->disable_vga(tg); in disable_vga_and_power_gate_all_controllers() 2105 if ((tg != NULL) && tg->funcs) { in set_drr() 2107 tg->funcs->set_drr(tg, ¶ms); in set_drr() 2656 if (!tg->funcs->is_counter_moving(tg)) { in wait_for_reset_trigger_to_occur() 2661 if (tg->funcs->did_triggered_reset_occur(tg)) { in wait_for_reset_trigger_to_occur() 2670 tg->funcs->wait_for_state(tg, CRTC_STATE_VACTIVE); in wait_for_reset_trigger_to_occur() 2671 tg->funcs->wait_for_state(tg, CRTC_STATE_VBLANK); in wait_for_reset_trigger_to_occur() 2811 tg->funcs->disable_vga(tg); in init_hw() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce/ |
| A D | dce_hwseq.c | 56 if (lock && pipe->stream_res.tg->funcs->is_blanked && in dce_pipe_control_lock() 57 pipe->stream_res.tg->funcs->is_blanked(pipe->stream_res.tg)) in dce_pipe_control_lock() 60 val = REG_GET_4(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], in dce_pipe_control_lock() 71 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock() 76 REG_SET_2(BLND_V_UPDATE_LOCK[pipe->stream_res.tg->inst], val, in dce_pipe_control_lock() 82 uint32_t value = REG_READ(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst]); in dce_pipe_control_lock() 83 REG_WRITE(CRTC_H_BLANK_START_END[pipe->stream_res.tg->inst], value); in dce_pipe_control_lock()
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| /linux/drivers/gpu/drm/amd/display/dc/link/accessories/ |
| A D | link_dp_cts.c | 447 if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) { in set_crtc_test_pattern() 449 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern() 488 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern() 824 inst_flags.dig_inst = pipe_ctx->stream_res.tg->inst; in dp_set_test_pattern() 832 pipe_ctx->stream_res.tg); in dp_set_test_pattern() 835 pipe_ctx->stream_res.tg->funcs->lock(pipe_ctx->stream_res.tg); in dp_set_test_pattern() 858 pipe_ctx->stream_res.tg->funcs->unlock(pipe_ctx->stream_res.tg); in dp_set_test_pattern() 859 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern() 861 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern() 863 pipe_ctx->stream_res.tg->funcs->wait_for_state(pipe_ctx->stream_res.tg, in dp_set_test_pattern() [all …]
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| /linux/drivers/iio/chemical/ |
| A D | sgp40.c | 172 struct sgp40_tg_measure tg = {.command = {0x26, 0x0F}}; in sgp40_measure_resistance_raw() local 179 tg.rht_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw() 180 tg.rht_crc = crc8(sgp40_crc8_table, (u8 *)&tg.rht_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw() 184 tg.temp_ticks = cpu_to_be16(ticks16); in sgp40_measure_resistance_raw() 185 tg.temp_crc = crc8(sgp40_crc8_table, (u8 *)&tg.temp_ticks, 2, SGP40_CRC8_INIT); in sgp40_measure_resistance_raw() 189 ret = i2c_master_send(client, (const char *)&tg, sizeof(tg)); in sgp40_measure_resistance_raw() 190 if (ret != sizeof(tg)) { in sgp40_measure_resistance_raw() 191 dev_warn(data->dev, "i2c_master_send ret: %d sizeof: %zu\n", ret, sizeof(tg)); in sgp40_measure_resistance_raw()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn31/ |
| A D | dcn31_hwseq.c | 197 if (tg) { in dcn31_init_hw() 198 if (tg->funcs->is_tg_enabled(tg) && tg->funcs->get_optc_source) { in dcn31_init_hw() 199 tg->funcs->get_optc_source(tg, &num_opps, in dcn31_init_hw() 520 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in dcn31_reset_back_end_for_pipe() 521 pipe_ctx->stream_res.tg, in dcn31_reset_back_end_for_pipe() 523 pipe_ctx->stream_res.tg->funcs->disable_crtc(pipe_ctx->stream_res.tg); in dcn31_reset_back_end_for_pipe() 524 pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, false); in dcn31_reset_back_end_for_pipe() 531 if (pipe_ctx->stream_res.tg->funcs->set_drr) in dcn31_reset_back_end_for_pipe() 532 pipe_ctx->stream_res.tg->funcs->set_drr( in dcn31_reset_back_end_for_pipe() 533 pipe_ctx->stream_res.tg, NULL); in dcn31_reset_back_end_for_pipe() [all …]
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn314/ |
| A D | dcn314_hwseq.c | 114 pipe_ctx->stream_res.tg->funcs->set_dsc_config(pipe_ctx->stream_res.tg, in update_dsc_on_stream() 120 pipe_ctx->stream_res.tg->funcs->set_dsc_config( in update_dsc_on_stream() 121 pipe_ctx->stream_res.tg, in update_dsc_on_stream() 169 pipe_ctx->stream_res.tg->funcs->set_odm_combine( in dcn314_update_odm() 170 pipe_ctx->stream_res.tg, in dcn314_update_odm() 174 pipe_ctx->stream_res.tg->funcs->set_odm_bypass( in dcn314_update_odm() 175 pipe_ctx->stream_res.tg, &pipe_ctx->stream->timing); in dcn314_update_odm() 375 pipe->stream_res.tg->funcs->disable_crtc(pipe->stream_res.tg); in dcn314_resync_fifo_dccg_dio() 401 pipe->stream_res.tg->funcs->set_odm_combine( in dcn314_resync_fifo_dccg_dio() 402 pipe->stream_res.tg, in dcn314_resync_fifo_dccg_dio() [all …]
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| /linux/arch/powerpc/kernel/ |
| A D | smp.c | 833 tg->property = thread_group_array[i]; in parse_thread_groups() 836 total_threads = tg->nr_groups * tg->threads_per_group; in parse_thread_groups() 841 tg->thread_list[j] = thread_list[j]; in parse_thread_groups() 871 for (i = 0; i < tg->nr_groups; i++) { in get_cpu_thread_group_start() 877 if (tg->thread_list[idx] == hw_cpu_id) in get_cpu_thread_group_start() 891 struct thread_groups *tg = NULL; in get_thread_groups() local 908 tg = &cpu_tgl->property_tgs[i]; in get_thread_groups() 913 if (!tg) in get_thread_groups() 917 return tg; in get_thread_groups() 947 struct thread_groups *tg = NULL; in init_thread_group_cache_map() local [all …]
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