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Searched refs:tiling (Results 1 – 25 of 54) sorted by relevance

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/linux/drivers/gpu/drm/ci/xfails/
A Dvirtio_gpu-none-fails.txt70 kms_bw@linear-tiling-1-displays-1920x1080p,Fail
71 kms_bw@linear-tiling-1-displays-2160x1440p,Fail
72 kms_bw@linear-tiling-1-displays-2560x1440p,Fail
73 kms_bw@linear-tiling-1-displays-3840x2160p,Fail
102 kms_bw@linear-tiling-2-displays-1920x1080p,Fail
103 kms_bw@linear-tiling-2-displays-2160x1440p,Fail
104 kms_bw@linear-tiling-2-displays-2560x1440p,Fail
105 kms_bw@linear-tiling-2-displays-3840x2160p,Fail
106 kms_bw@linear-tiling-3-displays-1920x1080p,Fail
107 kms_bw@linear-tiling-3-displays-2160x1440p,Fail
[all …]
A Dmediatek-mt8173-fails.txt9 kms_bw@connected-linear-tiling-1-displays-1920x1080p,Fail
10 kms_bw@connected-linear-tiling-1-displays-2160x1440p,Fail
11 kms_bw@connected-linear-tiling-1-displays-2560x1440p,Fail
17 kms_bw@linear-tiling-1-displays-1920x1080p,Fail
18 kms_bw@linear-tiling-1-displays-2160x1440p,Fail
19 kms_bw@linear-tiling-1-displays-2560x1440p,Fail
20 kms_bw@linear-tiling-1-displays-3840x2160p,Fail
21 kms_bw@linear-tiling-2-displays-1920x1080p,Fail
22 kms_bw@linear-tiling-2-displays-2160x1440p,Fail
23 kms_bw@linear-tiling-2-displays-2560x1440p,Fail
[all …]
A Dmediatek-mt8183-fails.txt12 kms_bw@connected-linear-tiling-1-displays-1920x1080p,Fail
13 kms_bw@connected-linear-tiling-1-displays-2160x1440p,Fail
14 kms_bw@connected-linear-tiling-1-displays-2560x1440p,Fail
15 kms_bw@linear-tiling-1-displays-1920x1080p,Fail
16 kms_bw@linear-tiling-1-displays-3840x2160p,Fail
A Drockchip-rk3399-flakes.txt6 kms_bw@linear-tiling-1-displays-2560x1440p
48 kms_bw@connected-linear-tiling-1-displays-2560x1440p
A Di915-glk-fails.txt39 kms_frontbuffer_tracking@fbc-tiling-linear,Fail
40 kms_frontbuffer_tracking@fbcdrrs-tiling-linear,Fail
A Dmediatek-mt8183-flakes.txt6 kms_bw@linear-tiling-1-displays-2560x1440p
A Dmsm-sc7180-trogdor-kingoftown-fails.txt43 kms_plane_lowres@tiling-none,Fail
A Dmsm-sc7180-trogdor-lazor-limozeen-fails.txt43 kms_plane_lowres@tiling-none,Fail
/linux/drivers/gpu/drm/tegra/
A Dfb.c37 struct tegra_bo_tiling *tiling) in tegra_fb_get_tiling() argument
52 tiling->mode = TEGRA_BO_TILING_MODE_PITCH; in tegra_fb_get_tiling()
53 tiling->value = 0; in tegra_fb_get_tiling()
57 tiling->mode = TEGRA_BO_TILING_MODE_TILED; in tegra_fb_get_tiling()
58 tiling->value = 0; in tegra_fb_get_tiling()
63 tiling->value = 0; in tegra_fb_get_tiling()
68 tiling->value = 1; in tegra_fb_get_tiling()
73 tiling->value = 2; in tegra_fb_get_tiling()
78 tiling->value = 3; in tegra_fb_get_tiling()
83 tiling->value = 4; in tegra_fb_get_tiling()
[all …]
A Dhub.c432 struct tegra_bo_tiling *tiling = &plane_state->tiling; in tegra_shared_plane_atomic_check() local
446 err = tegra_fb_get_tiling(new_plane_state->fb, tiling); in tegra_shared_plane_atomic_check()
450 if (tiling->mode == TEGRA_BO_TILING_MODE_BLOCK && in tegra_shared_plane_atomic_check()
456 if (tiling->sector_layout == TEGRA_BO_SECTOR_LAYOUT_GPU && in tegra_shared_plane_atomic_check()
636 if (tegra_plane_state->tiling.sector_layout == TEGRA_BO_SECTOR_LAYOUT_GPU) in tegra_shared_plane_atomic_update()
716 unsigned long height = tegra_plane_state->tiling.value; in tegra_shared_plane_atomic_update()
719 switch (tegra_plane_state->tiling.mode) { in tegra_shared_plane_atomic_update()
A Dgem.h49 struct tegra_bo_tiling tiling; member
A Dplane.h49 struct tegra_bo_tiling tiling; member
A Dplane.c63 copy->tiling = state->tiling; in tegra_plane_atomic_duplicate_state()
285 tegra_state->tiling.mode == TEGRA_BO_TILING_MODE_TILED) in tegra_plane_calculate_memory_bandwidth()
A Ddrm.h183 struct tegra_bo_tiling *tiling);
/linux/drivers/gpu/drm/i915/gem/
A Di915_gem_tiling.c62 if (tiling == I915_TILING_NONE) in i915_gem_fence_size()
68 stride *= i915_gem_tile_height(tiling); in i915_gem_fence_size()
96 unsigned int tiling, unsigned int stride) in i915_gem_fence_alignment() argument
104 if (tiling == I915_TILING_NONE) in i915_gem_fence_alignment()
120 unsigned int tiling, unsigned int stride) in i915_tiling_ok() argument
126 if (tiling == I915_TILING_NONE) in i915_tiling_ok()
129 if (tiling > I915_TILING_LAST) in i915_tiling_ok()
232 unsigned int tiling, unsigned int stride) in i915_gem_object_set_tiling() argument
282 if (tiling == I915_TILING_NONE) { in i915_gem_object_set_tiling()
300 vma->size, tiling, stride); in i915_gem_object_set_tiling()
[all …]
A Di915_gem_tiling.h16 unsigned int tiling, unsigned int stride);
18 unsigned int tiling, unsigned int stride);
A Di915_gem_object.h334 i915_gem_tile_height(unsigned int tiling) in i915_gem_tile_height() argument
336 GEM_BUG_ON(!tiling); in i915_gem_tile_height()
337 return tiling == I915_TILING_Y ? 32 : 8; in i915_gem_tile_height()
354 unsigned int tiling, unsigned int stride);
/linux/drivers/gpu/drm/i915/display/
A Dintel_fb_bo.c24 unsigned int tiling, stride; in intel_fb_bo_framebuffer_init() local
27 tiling = i915_gem_object_get_tiling(obj); in intel_fb_bo_framebuffer_init()
36 if (tiling != I915_TILING_NONE && in intel_fb_bo_framebuffer_init()
37 tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { in intel_fb_bo_framebuffer_init()
43 if (tiling == I915_TILING_X) { in intel_fb_bo_framebuffer_init()
45 } else if (tiling == I915_TILING_Y) { in intel_fb_bo_framebuffer_init()
57 tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) { in intel_fb_bo_framebuffer_init()
67 if (tiling != I915_TILING_NONE && mode_cmd->pitches[0] != stride) { in intel_fb_bo_framebuffer_init()
A Dintel_plane_initial.c192 switch (plane_config->tiling) { in initial_plane_vma()
199 plane_config->tiling; in initial_plane_vma()
202 MISSING_CASE(plane_config->tiling); in initial_plane_vma()
385 if (plane_config->tiling) in intel_find_initial_plane_obj()
/linux/drivers/gpu/drm/i915/gem/selftests/
A Di915_gem_client_blt.c96 enum client_tiling tiling; member
224 if (src->tiling) { in prepare_blit()
230 if (dst->tiling) { in prepare_blit()
324 t->buffers[i].tiling = in tiled_blits_create_buffers()
350 enum client_tiling tiling, in tiled_offset() argument
356 if (tiling == CLIENT_TILING_LINEAR) in tiled_offset()
361 if (tiling == CLIENT_TILING_X) { in tiled_offset()
406 switch (tiling) { in repr_tiling()
435 buf->tiling, x, y); in verify_buffer()
442 repr_tiling(buf->tiling), in verify_buffer()
[all …]
A Di915_gem_mman.c35 unsigned int tiling; member
48 if (tile->tiling == I915_TILING_NONE) in tiled_offset()
54 if (tile->tiling == I915_TILING_X) { in tiled_offset()
111 tile->tiling, tile->stride, err); in check_partial_mapping()
321 int tiling; in igt_partial_tiling() local
359 tile.tiling = I915_TILING_NONE; in igt_partial_tiling()
366 for (tiling = I915_TILING_X; tiling <= I915_TILING_Y; tiling++) { in igt_partial_tiling()
380 tile.tiling = tiling; in igt_partial_tiling()
381 switch (tiling) { in igt_partial_tiling()
491 tile.tiling = in igt_smoke_tiling()
[all …]
/linux/drivers/gpu/drm/i915/gt/
A Dintel_ggtt_fencing.c77 if (fence->tiling) { in i965_write_fence_reg()
86 if (fence->tiling == I915_TILING_Y) in i965_write_fence_reg()
118 if (fence->tiling) { in i915_write_fence_reg()
120 unsigned int tiling = fence->tiling; in i915_write_fence_reg() local
121 bool is_y_tiled = tiling == I915_TILING_Y; in i915_write_fence_reg()
152 if (fence->tiling) { in i830_write_fence_reg()
156 if (fence->tiling == I915_TILING_Y) in i830_write_fence_reg()
209 fence->tiling = 0; in fence_update()
228 fence->tiling = i915_gem_object_get_tiling(vma->obj); in fence_update()
305 fence->tiling = 0; in i915_vma_revoke_fence()
A Dintel_ggtt_fencing.h40 u32 tiling; member
/linux/drivers/gpu/drm/vc4/
A Dvc4_render_cl.c440 uint8_t tiling = VC4_GET_FIELD(surf->bits, in vc4_rcl_surface_setup() local
491 if (tiling > VC4_TILING_FORMAT_LT) { in vc4_rcl_surface_setup()
525 if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling, in vc4_rcl_surface_setup()
539 uint8_t tiling = VC4_GET_FIELD(surf->bits, in vc4_rcl_render_config_surface_setup() local
568 if (tiling > VC4_TILING_FORMAT_LT) { in vc4_rcl_render_config_surface_setup()
586 if (!vc4_check_tex_size(exec, *obj, surf->offset, tiling, in vc4_rcl_render_config_surface_setup()
A Dvc4_plane.c829 u32 tiling, src_y; in vc4_plane_mode_set() local
867 tiling = SCALER_CTL0_TILING_LINEAR; in vc4_plane_mode_set()
930 tiling = SCALER_CTL0_TILING_256B_OR_T; in vc4_plane_mode_set()
966 tiling = SCALER_CTL0_TILING_128B; in vc4_plane_mode_set()
972 tiling = SCALER_CTL0_TILING_64B; in vc4_plane_mode_set()
975 tiling = SCALER_CTL0_TILING_128B; in vc4_plane_mode_set()
978 tiling = SCALER_CTL0_TILING_256B_OR_T; in vc4_plane_mode_set()
1069 VC4_SET_FIELD(tiling, SCALER_CTL0_TILING) | in vc4_plane_mode_set()
1109 VC4_SET_FIELD(tiling, SCALER_CTL0_TILING) | in vc4_plane_mode_set()

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