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Searched refs:to_intel_crtc_state (Results 1 – 20 of 20) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_modeset_setup.c40 to_intel_crtc_state(crtc->base.state); in intel_crtc_disable_noatomic_begin()
164 to_intel_crtc_state(crtc->base.state); in intel_crtc_disable_noatomic_complete()
202 to_intel_crtc_state(temp_crtc->base.state); in get_transcoder_pipes()
226 to_intel_crtc_state(crtc->base.state); in get_portsync_pipes()
319 to_intel_crtc_state(crtc->base.state); in intel_modeset_update_connector_atomic_state()
554 to_intel_crtc_state(crtc->base.state); in intel_sanitize_all_crtcs()
690 to_intel_crtc_state(crtc->base.state); in readout_plane_state()
713 to_intel_crtc_state(crtc->base.state); in intel_modeset_readout_hw_state()
836 to_intel_crtc_state(crtc->base.state); in intel_modeset_readout_hw_state()
978 to_intel_crtc_state(crtc->base.state); in intel_modeset_setup_hw_state()
[all …]
A Dintel_display.h333 (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), 1); \
349 (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
357 (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
374 (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
375 (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
383 (old_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].old_state), \
384 (new_crtc_state) = to_intel_crtc_state((__state)->base.crtcs[__i].new_state), 1); \
A Dintel_atomic.c240 const struct intel_crtc_state *old_crtc_state = to_intel_crtc_state(crtc->state); in intel_crtc_duplicate_state()
312 struct intel_crtc_state *crtc_state = to_intel_crtc_state(state); in intel_crtc_destroy_state()
369 return to_intel_crtc_state(crtc_state); in intel_atomic_get_crtc_state()
A Dintel_display_debugfs.c423 to_intel_crtc_state(crtc->base.state); in intel_scaler_info()
557 to_intel_crtc_state(crtc->base.state); in intel_crtc_info()
686 to_intel_crtc_state(crtc->base.state); in i915_ddb_info()
993 crtc_state = to_intel_crtc_state(crtc->base.state); in i915_fifo_underrun_reset_write()
1187 crtc_state = to_intel_crtc_state(crtc->state); in i915_dsc_fec_support_show()
1282 crtc_state = to_intel_crtc_state(crtc->state); in i915_dsc_bpc_show()
1348 crtc_state = to_intel_crtc_state(crtc->state); in i915_dsc_output_format_show()
1485 crtc_state = to_intel_crtc_state(crtc->base.state); in i915_current_bpc_show()
A Dintel_drrs.c319 crtc_state = to_intel_crtc_state(crtc->base.state); in intel_drrs_debugfs_status_show()
361 crtc_state = to_intel_crtc_state(crtc->base.state); in intel_drrs_debugfs_ctl_set()
A Dintel_plane_initial.c32 to_intel_crtc_state(crtc->base.state); in intel_reuse_initial_plane_obj()
422 if (!to_intel_crtc_state(crtc->base.state)->uapi.active) in intel_initial_plane_config()
A Dintel_fbdev.c321 to_intel_crtc_state(crtc->base.state); in intel_fbdev_init_bios()
361 to_intel_crtc_state(crtc->base.state); in intel_fbdev_init_bios()
432 to_intel_crtc_state(crtc->base.state); in intel_fbdev_init_bios()
A Dhsw_ips.c301 crtc_state = to_intel_crtc_state(crtc->base.state); in hsw_ips_debugfs_false_color_set()
A Dintel_alpm.c388 crtc_state = to_intel_crtc_state(crtc->state); in i915_edp_lobf_info_show()
A Dintel_display_types.h1618 #define to_intel_crtc_state(crtc_state) \ macro
2127 return to_intel_crtc_state(drm_atomic_get_old_crtc_state(&state->base, in intel_atomic_get_old_crtc_state()
2135 return to_intel_crtc_state(drm_atomic_get_new_crtc_state(&state->base, in intel_atomic_get_new_crtc_state()
A Dintel_cursor.c792 to_intel_crtc_state(crtc->base.state); in intel_legacy_cursor_update()
838 new_crtc_state = to_intel_crtc_state(intel_crtc_duplicate_state(&crtc->base)); in intel_legacy_cursor_update()
A Di9xx_wm.c3357 struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); in ilk_pipe_wm_get_hw_state()
3487 to_intel_crtc_state(crtc->base.state)->wm = crtc_state->wm; in ilk_wm_sanitize()
3635 to_intel_crtc_state(crtc->base.state); in g4x_wm_get_hw_state()
3728 to_intel_crtc_state(crtc->base.state); in g4x_wm_sanitize()
3750 to_intel_crtc_state(crtc->base.state); in g4x_wm_sanitize()
3820 to_intel_crtc_state(crtc->base.state); in vlv_wm_get_hw_state()
3883 to_intel_crtc_state(crtc->base.state); in vlv_wm_sanitize()
3902 to_intel_crtc_state(crtc->base.state); in vlv_wm_sanitize()
A Dintel_dp_tunnel.c132 to_intel_crtc_state(crtc->base.state); in allocate_initial_tunnel_bw_for_pipes()
A Dskl_watermark.c2985 to_intel_crtc_state(crtc->base.state); in skl_wm_get_hw_state()
3051 to_intel_crtc_state(crtc->base.state); in skl_dbuf_is_misconfigured()
3058 to_intel_crtc_state(crtc->base.state); in skl_dbuf_is_misconfigured()
3099 to_intel_crtc_state(crtc->base.state); in skl_wm_sanitize()
A Dintel_dp.c5350 crtc_state = to_intel_crtc_state(crtc->base.state); in intel_dp_get_active_pipes()
5477 crtc_state = to_intel_crtc_state(crtc->base.state); in intel_dp_prep_phy_test()
5521 to_intel_crtc_state(crtc->base.state); in intel_dp_do_phy_test()
A Dskl_universal_plane.c2635 struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); in skl_get_initial_plane_config()
A Dintel_dpll_mgr.c4516 to_intel_crtc_state(crtc->base.state); in readout_dpll_hw_state()
A Dintel_ddi.c4490 crtc_state = to_intel_crtc_state(crtc->base.state); in intel_hdmi_reset_link()
A Dintel_display.c675 to_intel_crtc_state(crtc->base.state); in intel_plane_disable_noatomic()
/linux/drivers/gpu/drm/xe/display/
A Dxe_plane_initial.c39 to_intel_crtc_state(crtc->base.state); in intel_reuse_initial_plane_obj()
198 to_intel_crtc_state(crtc->base.state); in intel_find_initial_plane_obj()
287 if (!to_intel_crtc_state(crtc->base.state)->uapi.active) in intel_initial_plane_config()

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