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Searched refs:training_lane (Results 1 – 3 of 3) sorted by relevance

/linux/drivers/gpu/drm/bridge/analogix/
A Danalogix_dp_core.c268 dp->link_train.training_lane[lane] = in analogix_dp_link_start()
366 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_get_adjust_training_lane() local
374 training_lane = DPCD_VOLTAGE_SWING_SET(voltage_swing) | in analogix_dp_get_adjust_training_lane()
378 training_lane |= DP_TRAIN_MAX_SWING_REACHED; in analogix_dp_get_adjust_training_lane()
380 training_lane |= DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; in analogix_dp_get_adjust_training_lane()
382 dp->link_train.training_lane[lane] = training_lane; in analogix_dp_get_adjust_training_lane()
389 u8 voltage_swing, pre_emphasis, training_lane; in analogix_dp_process_clock_recovery() local
422 training_lane = analogix_dp_get_lane_link_training(dp, lane); in analogix_dp_process_clock_recovery()
427 DPCD_PRE_EMPHASIS_GET(training_lane) == pre_emphasis) in analogix_dp_process_clock_recovery()
445 dp->link_train.training_lane, lane_count); in analogix_dp_process_clock_recovery()
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A Danalogix_dp_core.h147 u8 training_lane[4]; member
A Danalogix_dp_reg.c551 writel(dp->link_train.training_lane[lane], in analogix_dp_set_lane_link_training()

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