| /linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| A D | ucode_loader.c | 94 void brcms_ucode_data_free(struct brcms_ucode *ucode) in brcms_ucode_data_free() argument 97 brcms_ucode_free_buf((void *)ucode->d11lcn0initvals24); in brcms_ucode_data_free() 99 brcms_ucode_free_buf((void *)ucode->d11lcn1initvals24); in brcms_ucode_data_free() 101 brcms_ucode_free_buf((void *)ucode->d11lcn2initvals24); in brcms_ucode_data_free() 102 brcms_ucode_free_buf((void *)ucode->d11n0absinitvals16); in brcms_ucode_data_free() 103 brcms_ucode_free_buf((void *)ucode->d11n0bsinitvals16); in brcms_ucode_data_free() 104 brcms_ucode_free_buf((void *)ucode->d11n0initvals16); in brcms_ucode_data_free() 105 brcms_ucode_free_buf((void *)ucode->bcm43xx_16_mimo); in brcms_ucode_data_free() 106 brcms_ucode_free_buf((void *)ucode->bcm43xx_24_lcn); in brcms_ucode_data_free() 107 brcms_ucode_free_buf((void *)ucode->bcm43xx_bommajor); in brcms_ucode_data_free() [all …]
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| A D | ucode_loader.h | 46 int brcms_ucode_data_init(struct brcms_info *wl, struct brcms_ucode *ucode); 48 void brcms_ucode_data_free(struct brcms_ucode *ucode);
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| A D | amdgpu_ucode.c | 834 if (!ucode->fw) in amdgpu_ucode_init_single_fw() 837 ucode->mc_addr = mc_addr; in amdgpu_ucode_init_single_fw() 838 ucode->kaddr = kptr; in amdgpu_ucode_init_single_fw() 856 switch (ucode->ucode_id) { in amdgpu_ucode_init_single_fw() 972 ucode->ucode_size = ucode->fw->size; in amdgpu_ucode_init_single_fw() 976 ucode->ucode_size = ucode->fw->size; in amdgpu_ucode_init_single_fw() 1077 memcpy(ucode->kaddr, ucode_addr, ucode->ucode_size); in amdgpu_ucode_init_single_fw() 1090 if (!ucode->fw) in amdgpu_ucode_patch_jt() 1095 dst_addr = ucode->kaddr + in amdgpu_ucode_patch_jt() 1156 ucode = &adev->firmware.ucode[i]; in amdgpu_ucode_init_bo() [all …]
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| A D | amdgpu_cgs.c | 213 struct amdgpu_firmware_info *ucode; in amdgpu_cgs_get_firmware_info() local 219 ucode = &adev->firmware.ucode[id]; in amdgpu_cgs_get_firmware_info() 220 if (ucode->fw == NULL) in amdgpu_cgs_get_firmware_info() 223 gpu_addr = ucode->mc_addr; in amdgpu_cgs_get_firmware_info() 224 header = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_cgs_get_firmware_info() 233 info->kptr = ucode->kaddr; in amdgpu_cgs_get_firmware_info() 251 struct amdgpu_firmware_info *ucode = NULL; in amdgpu_cgs_get_firmware_info() local 425 ucode = &adev->firmware.ucode[AMDGPU_UCODE_ID_SMC]; in amdgpu_cgs_get_firmware_info() 426 ucode->ucode_id = AMDGPU_UCODE_ID_SMC; in amdgpu_cgs_get_firmware_info() 427 ucode->fw = adev->pm.fw; in amdgpu_cgs_get_firmware_info() [all …]
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| A D | amdgpu_rlc.c | 332 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_G]; in amdgpu_gfx_rlc_init_microcode_v2_0() 368 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL]; in amdgpu_gfx_rlc_init_microcode_v2_1() 406 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_IRAM]; in amdgpu_gfx_rlc_init_microcode_v2_2() 414 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_DRAM]; in amdgpu_gfx_rlc_init_microcode_v2_2() 441 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_P]; in amdgpu_gfx_rlc_init_microcode_v2_3() 449 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_RLC_V]; in amdgpu_gfx_rlc_init_microcode_v2_3() 477 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_GLOBAL_TAP_DELAYS]; in amdgpu_gfx_rlc_init_microcode_v2_4() 485 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SE0_TAP_DELAYS]; in amdgpu_gfx_rlc_init_microcode_v2_4() 493 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SE1_TAP_DELAYS]; in amdgpu_gfx_rlc_init_microcode_v2_4() 501 info = &adev->firmware.ucode[AMDGPU_UCODE_ID_SE2_TAP_DELAYS]; in amdgpu_gfx_rlc_init_microcode_v2_4() [all …]
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| A D | amdgpu_psp.c | 716 if (ucode) in psp_cmd_submit_buf() 719 amdgpu_ucode_name(ucode->ucode_id), ucode->ucode_id); in psp_cmd_submit_buf() 737 if (ucode) { in psp_cmd_submit_buf() 2398 switch (ucode->ucode_id) { in psp_get_fw_type() 2621 switch (ucode->ucode_id) { in psp_print_fw_hdr() 2764 if (!ucode->fw || !ucode->ucode_size) in fw_load_skip_check() 2793 struct amdgpu_firmware_info *ucode; in psp_load_fw_list() local 2796 ucode = ucode_list[i]; in psp_load_fw_list() 2797 psp_print_fw_hdr(psp, ucode); in psp_load_fw_list() 2822 ucode = &adev->firmware.ucode[i]; in psp_load_non_psp_fw() [all …]
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| A D | smu_v13_0_10.c | 150 struct amdgpu_firmware_info *ucode; in smu_v13_0_10_mode2_restore_ip() local 155 ucode = &adev->firmware.ucode[i]; in smu_v13_0_10_mode2_restore_ip() 157 switch (ucode->ucode_id) { in smu_v13_0_10_mode2_restore_ip() 160 ucode_list[ucode_count++] = ucode; in smu_v13_0_10_mode2_restore_ip()
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| A D | aldebaran.c | 210 struct amdgpu_firmware_info *ucode; in aldebaran_mode2_restore_ip() local 217 ucode = &adev->firmware.ucode[i]; in aldebaran_mode2_restore_ip() 218 if (!ucode->fw) in aldebaran_mode2_restore_ip() 220 switch (ucode->ucode_id) { in aldebaran_mode2_restore_ip() 235 ucode_list[ucode_count++] = ucode; in aldebaran_mode2_restore_ip()
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| /linux/drivers/crypto/marvell/octeontx/ |
| A D | otx_cptpf_ucode.c | 395 curr->ucode.ver_num.nn, curr->ucode.ver_num.xx, in print_tar_dbg_info() 396 curr->ucode.ver_num.yy, curr->ucode.ver_num.zz); in print_tar_dbg_info() 575 ucode->ver_num.xx, ucode->ver_num.yy, ucode->ver_num.zz); in print_ucode_dbg_info() 845 ucode->va, ucode->dma); in ucode_unload() 866 ucode->va = dma_alloc_coherent(dev, ucode->size + in copy_ucode_to_dma_mem() 923 ucode->filename, ucode->type); in ucode_load() 967 eng_grp->engs[i].ucode = &eng_grp->ucode[0]; in disable_eng_grp() 1207 ucode = &eng_grp->g->grp[eng_grp->mirror.idx].ucode[0]; in update_ucode_ptrs() 1209 ucode = &eng_grp->ucode[0]; in update_ucode_ptrs() 1211 eng_grp->engs[0].ucode = ucode; in update_ucode_ptrs() [all …]
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| A D | otx_cptpf_mbox.c | 140 struct otx_cpt_ucode *ucode; in otx_cpt_bind_vq_to_grp() local 165 ucode = &eng_grp->g->grp[eng_grp->mirror.idx].ucode[0]; in otx_cpt_bind_vq_to_grp() 167 ucode = &eng_grp->ucode[0]; in otx_cpt_bind_vq_to_grp() 169 if (otx_cpt_uc_supports_eng_type(ucode, OTX_CPT_SE_TYPES)) in otx_cpt_bind_vq_to_grp() 171 else if (otx_cpt_uc_supports_eng_type(ucode, OTX_CPT_AE_TYPES)) in otx_cpt_bind_vq_to_grp()
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| A D | otx_cptpf_ucode.h | 97 struct otx_cpt_ucode ucode;/* microcode information */ member 115 struct otx_cpt_ucode *ucode; /* ucode used by these engines */ member 141 struct otx_cpt_ucode ucode[OTX_CPT_MAX_ETYPES_PER_GRP]; member 176 int otx_cpt_uc_supports_eng_type(struct otx_cpt_ucode *ucode, int eng_type);
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| /linux/drivers/crypto/marvell/octeontx2/ |
| A D | otx2_cptpf_ucode.c | 445 curr->ucode.ver_num.nn, curr->ucode.ver_num.xx, in print_uc_info() 446 curr->ucode.ver_num.yy, curr->ucode.ver_num.zz); in print_uc_info() 675 if (ucode->va) { in ucode_unload() 698 if (!ucode->va) in copy_ucode_to_dma_mem() 748 eng_grp->engs[i].ucode = &eng_grp->ucode[0]; in disable_eng_grp() 964 ucode = &eng_grp->g->grp[eng_grp->mirror.idx].ucode[0]; in update_ucode_ptrs() 966 ucode = &eng_grp->ucode[0]; in update_ucode_ptrs() 968 eng_grp->engs[0].ucode = ucode; in update_ucode_ptrs() 972 eng_grp->engs[1].ucode = &eng_grp->ucode[1]; in update_ucode_ptrs() 974 eng_grp->engs[1].ucode = ucode; in update_ucode_ptrs() [all …]
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| A D | otx2_cptpf_ucode.h | 90 struct otx2_cpt_ucode ucode;/* microcode information */ member 110 struct otx2_cpt_ucode *ucode; /* ucode used by these engines */ member 135 struct otx2_cpt_ucode ucode[OTX2_CPT_MAX_ETYPES_PER_GRP]; member
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| /linux/drivers/soc/fsl/qe/ |
| A D | qe.c | 406 const struct qe_microcode *ucode) in qe_upload_microcode() argument 408 const __be32 *code = base + be32_to_cpu(ucode->code_offset); in qe_upload_microcode() 411 if (ucode->major || ucode->minor || ucode->revision) in qe_upload_microcode() 414 ucode->id, ucode->major, ucode->minor, ucode->revision); in qe_upload_microcode() 417 "uploading microcode '%s'\n", ucode->id); in qe_upload_microcode() 423 for (i = 0; i < be32_to_cpu(ucode->count); i++) in qe_upload_microcode() 535 const struct qe_microcode *ucode = &firmware->microcode[i]; in qe_upload_firmware() local 538 if (ucode->code_offset) in qe_upload_firmware() 539 qe_upload_microcode(firmware, ucode); in qe_upload_firmware() 543 u32 trap = be32_to_cpu(ucode->traps[j]); in qe_upload_firmware() [all …]
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| /linux/drivers/crypto/cavium/nitrox/ |
| A D | nitrox_main.c | 59 struct ucode { struct 113 struct ucode *ucode; in nitrox_load_fw() local 131 ucode = (struct ucode *)fw->data; in nitrox_load_fw() 133 ucode_size = be32_to_cpu(ucode->code_size) * 2; in nitrox_load_fw() 140 ucode_data = ucode->code; in nitrox_load_fw() 143 memcpy(&ndev->hw.fw_name[0][0], ucode->version, (VERSION_LEN - 2)); in nitrox_load_fw() 182 ucode = (struct ucode *)fw->data; in nitrox_load_fw() 184 ucode_size = be32_to_cpu(ucode->code_size) * 2; in nitrox_load_fw() 191 ucode_data = ucode->code; in nitrox_load_fw() 194 memcpy(&ndev->hw.fw_name[1][0], ucode->version, (VERSION_LEN - 2)); in nitrox_load_fw()
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| /linux/drivers/input/touchscreen/ |
| A D | hideep.c | 444 val = be32_to_cpu(ucode[0]); in hideep_program_page() 448 ucode, xfer_count); in hideep_program_page() 450 val = be32_to_cpu(ucode[xfer_count - 1]); in hideep_program_page() 482 xfer_count = xfer_len / sizeof(*ucode); in hideep_program_nvm() 496 ucode, xfer_count); in hideep_program_nvm() 507 ucode += xfer_count; in hideep_program_nvm() 528 xfer_count = xfer_len / sizeof(*ucode); in hideep_verify_nvm() 540 const u8 *ucode_bytes = (const u8 *)ucode; in hideep_verify_nvm() 554 ucode += xfer_count; in hideep_verify_nvm() 612 const __be32 *ucode, size_t ucode_len) in hideep_flash_firmware() argument [all …]
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| /linux/Documentation/arch/x86/ |
| A D | microcode.rst | 72 if [ -d /lib/firmware/amd-ucode ]; then 73 cat /lib/firmware/amd-ucode/microcode_amd*.bin > $DSTDIR/AuthenticAMD.bin 76 if [ -d /lib/firmware/intel-ucode ]; then 77 cat /lib/firmware/intel-ucode/* > $DSTDIR/GenuineIntel.bin 80 find . | cpio -o -H newc >../ucode.cpio 83 cat ucode.cpio $INITRD.orig > $INITRD 104 /lib/firmware/{intel-ucode,amd-ucode}. The default distro installation 220 CONFIG_EXTRA_FIRMWARE="intel-ucode/06-3a-09 amd-ucode/microcode_amd_fam15h.bin" 226 |-- amd-ucode 230 |-- intel-ucode
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| A D | tsx_async_abort.rst | 46 ucode needed Mitigation is enabled. CPU is affected and MD_CLEAR is not 71 …0 1 0 HW default No Need ucode update Need ucode up… 86 …0 1 0 HW default No Need ucode update Need ucode up… 101 …0 1 0 HW default No Need ucode update Need ucode up…
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| /linux/drivers/net/wireless/intel/iwlwifi/ |
| A D | iwl-drv.c | 514 build = le32_to_cpu(ucode->u.v2.build); in iwl_parse_v1_v2_firmware() 516 le32_to_cpu(ucode->u.v2.inst_size)); in iwl_parse_v1_v2_firmware() 523 src = ucode->u.v2.data; in iwl_parse_v1_v2_firmware() 542 src = ucode->u.v1.data; in iwl_parse_v1_v2_firmware() 710 if (len < sizeof(*ucode)) { in iwl_parse_tlv_firmware() 717 le32_to_cpu(ucode->magic)); in iwl_parse_tlv_firmware() 724 build = le32_to_cpu(ucode->build); in iwl_parse_tlv_firmware() 740 data = ucode->data; in iwl_parse_tlv_firmware() 742 len -= sizeof(*ucode); in iwl_parse_tlv_firmware() 1476 const struct iwl_ucode_header *ucode; in iwl_req_fw_callback() local [all …]
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| /linux/arch/x86/kernel/cpu/microcode/ |
| A D | amd.c | 388 static size_t parse_container(u8 *ucode, size_t size, struct cont_desc *desc) in parse_container() argument 392 u32 *hdr = (u32 *)ucode; in parse_container() 396 if (!verify_equivalence_table(ucode, size)) in parse_container() 399 buf = ucode; in parse_container() 456 desc->data = ucode; in parse_container() 469 static void scan_containers(u8 *ucode, size_t size, struct cont_desc *desc) in scan_containers() argument 472 size_t s = parse_container(ucode, size, desc); in scan_containers() 478 ucode += s; in scan_containers() 512 static bool early_apply_microcode(u32 old_rev, void *ucode, size_t size) in early_apply_microcode() argument 518 scan_containers(ucode, size, &desc); in early_apply_microcode()
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| /linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/ |
| A D | ctxnv40.h | 13 u32 *ucode; member 27 u32 *ctxprog = ctx->ucode; in cp_out() 61 u32 *ctxprog = ctx->ucode; in cp_name()
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| A D | gf104.c | 135 .fecs.ucode = &gf100_gr_fecs_ucode, 137 .gpccs.ucode = &gf100_gr_gpccs_ucode,
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| A D | gf110.c | 107 .fecs.ucode = &gf100_gr_fecs_ucode, 109 .gpccs.ucode = &gf100_gr_gpccs_ucode,
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| A D | gk110b.c | 126 .fecs.ucode = &gk110_gr_fecs_ucode, 128 .gpccs.ucode = &gk110_gr_gpccs_ucode,
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| A D | gf108.c | 133 .fecs.ucode = &gf100_gr_fecs_ucode, 135 .gpccs.ucode = &gf100_gr_gpccs_ucode,
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