Home
last modified time | relevance | path

Searched refs:update_m_n (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/i915/display/
A Dintel_vblank.c630 new_crtc_state->update_m_n || new_crtc_state->update_lrr); in intel_vblank_evade_init()
654 new_crtc_state->update_m_n || new_crtc_state->update_lrr) in intel_vblank_evade_init()
A Dintel_atomic.c267 crtc_state->update_m_n = false; in intel_crtc_duplicate_state()
A Dintel_display.c1031 (new_crtc_state->update_m_n || new_crtc_state->update_lrr || in intel_crtc_vrr_enabling()
1048 (new_crtc_state->update_m_n || new_crtc_state->update_lrr || in intel_crtc_vrr_disabling()
5295 if (!fastset || !pipe_config->update_m_n) in intel_pipe_config_compare()
5416 if (!fastset || !pipe_config->update_m_n) { in intel_pipe_config_compare()
5599 crtc_state->update_m_n = false; in intel_crtc_flag_modeset()
5788 new_crtc_state->update_m_n = false; in intel_crtc_check_fastset()
6804 if (new_crtc_state->update_m_n) in intel_pipe_fastset()
6959 new_crtc_state->update_m_n || new_crtc_state->update_lrr) in intel_update_crtc()
A Dintel_display_types.h1095 bool update_m_n; /* update M/N seamlessly during fastset? */ member
A Dintel_dp.c2874 pipe_config->update_m_n = true; in intel_dp_drrs_compute_config()

Completed in 42 milliseconds